What can be the reason for avl_ready being deasserted?
IP
Category: External memory interface
Tools: Quartus® Prime
device:-
Possible factors include:
- When Timing Bank Pool is Full
- When FIFO for read data from memory device is full
- When FIFO for write data is full
- When the controller is waiting for write data in ECC mode
Reference information
https://www.altera.com/en_US/pdfs/literature/hb/external-memory/emi.pdf
(See avl_ready in the Local Interface Signals table.)
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