I would like to use the clocks input to CLK_OSC1 and CLK_OSC2 of the Hard Processor System (HPS) on the FPGA side, but can I use CLK_OSC1 and CLK_OSC2 on the FPGA side regardless of whether the OS on the HPS side is running?

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I would like to use the clocks input to CLK_OSC1 and CLK_OSC2 of the Hard Processor System (HPS) on the FPGA side. Can I use CLK_OSC1 and CLK_OSC2 on the FPGA side regardless of whether the OS on the HPS side is started?

SoC FPGAs

Category: SoCs
tool:-
Device: Arria® V

Regarding CLK_OSC1, as shown in the following knowledge database, the input clock to the pin is distributed to the FPGA side as it is.
Note that the preloader will then reconfigure the PLL.
https://www.altera.com/support/support-resources/knowledge-base/solutions/rd01212015_943.html

CLK_OSC2 is optional and switching is done by Preloader.
Therefore, this clock cannot be passed to the FPGA side without running the Preloader.

If you use it as a clock on the FPGA side, it is recommended to place it on the FPGA side instead of the HPS side.

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