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Does the PCI Express* Avalon-MM High Performance DMA Reference Design support Transaction Layer Packet (TLP) splitting (for alignment on 4Kbyte boundaries)?
Category: PCIe*
tool:-
Device: Stratix® V
Yes.
For details, refer to the document below.
PCIe* Avalon-MM High Performance DMA Reference Design
https://www.altera.co.jp/products/reference-designs/all-reference-designs/interface/ref-pciexpress-avalonmm-hp.html
document
https://www.altera.com/en_US/pdfs/literature/ug/ug_pcie_avmm_dma.pdf
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