For Avalon-MM Base Address Register (BAR) numbers 0, 2, and 4, there is a selectable data bus width of 64 bits, but for numbers 1, 3, and 5, only 32 bits can be selected. why?

Narrow down by specifying conditions

There are currently 4341 results.

If the Avalon-MM Base Address Register (BAR) number is 0,2,4, there is 64bit as a data bus width that can be selected, but if it is 1,3,5, only 32bit can be selected. why?

PCI Express

Category: PCI Express* (PCIe*)
Tools: Quartus® Prime / Quartus® II
device:-

PCI Express basically has six 32-bit size address spaces (Type0 Header).
If 64-bit size is required, configure using BAR0:1, BAR2:3, and BAR4:5 respectively.
Therefore, only BAR0, BAR2, and BAR4 can be set to 64bit size.

Experienced FAE
Free consultation is available.

From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.

Inquiry form

Site Search