What should I do with the pll select pin when using Transceiver Native PHY with Enable TX PLL dynamic reconfiguration (TX PMA): unchecked, Use external TX PLL (RX PMA): unchecked, and Number of TX PLLs: 1? Is not it?

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Enable TX PLL dynamic reconfiguration (TX PMA): unchecked, Use external TX PLL (RX PMA): unchecked, Number of TX PLLs: 1 When using the Transceiver Native PHY, what should I do with the pll select pin? Is not it?

Clock/PLL

Category: Transceiver
Tools: Quartus® Prime / Quartus II
Device: Cyclone® V

Please fix it to Low.

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