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Is it possible to explicitly specify a DSP block when writing a multiplier in Verilog-HDL?

DSP/Filter

Category: Quartus® Prime / Quartus II
Tool: Quartus Prime / Quartus II
device:-


The DSP can be specified explicitly by writing as follows.
You can also explicitly specify a logic element (LE) by writing the dsp part below as logic.

wire[8:0] a, b;
(* multstyle = "dsp" *) wire [17:0] res;
assign res = a * b;

See below for details.
https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/hdl/vlog/vlog_file_dir_multstyle.htm


 

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