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I am trying to use ALTLVDS_TX on an Arria V device, but I am getting a Fitter Error due to some pinouts. Where should I check?

IP

Category: IP
Tools: Quartus® Prime / Quartus II
Device: Arria® V


There are three types of pins that can be used as LVDS in Arria V devices:

(1) DIFFIO_RX_[B,T][#:#]p,
(2) DIFFIO_TX_[B,T][#:#]p,
(3) DIFFOUT_[B,T,R][#:#]p,

For LVDS Transmitters, (2) and (3) above can be used.
The difference between these two is as follows, and in the case of ALTLVDS_TX IP output, please assign it to the DIFFIO_TX pin.

DIFFIO_TX: for True LVDS Transmitter (output from LVDS IP is possible, using termination resistor built into FPGA)
DIFFOUT: For Emulated LVDS Transmitter (I/O standard is LVDS output only. Termination resistor is used outside FPGA)


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