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Are there any precautions when using VREF pins as user I/O in MAX 10 devices?

MAX

Category: Specifications
Tools: Quartus® II
Device: MAX®10


Since the VREF pin has a large capacitance component compared to normal user I/O, both input and output delays are large.
You can check the specific delay values in the timing analysis results.

For details, refer to the document below.
https://www.altera.com/en_US/pdfs/literature/dp/max-10/pcg-01018.pdf
(Search for VREFB<#>N0.)

Also, for the pin capacitance of the VREF pin, refer to the document below.
https://www.altera.com/en_US/pdfs/literature/hb/max-10/m10_datasheet.pdf
(Search for Pin Capacitance.)


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