Are there any considerations when using VREF pins as user I/O in Cyclone IV devices?
Category: Specifications
Tools: Quartus® II/Prime
Device: Cyclone® IV
Since the VREF pin has a large capacitance component compared to normal user I/O, both input and output delays are large.
You can check the specific delay values in the timing analysis results.
For details, refer to the document below.
https://www.altera.com/en_US/pdfs/literature/hb/cyclone-iv/cyiv-51006.pdf
(search for higher pin capacitance)
Also, for the pin capacitance of the VREF pin, refer to the document below.
https://www.altera.com/en_US/pdfs/literature/hb/cyclone-iv/cyiv-53001.pdf
(Search for Pin Capacitance.)
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