Is it possible to turn off the FPGA power supply after switching to user mode on a Cyclone V SoC device?

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Is it possible to power down the FPGA side after entering user mode in a Cyclone V SoC device?

SoC FPGAs

Category: Specifications
tool:-
Device: Cyclone® V

It is possible to power down the FPGA side after entering user mode in a Cyclone V SoC device.
To achieve this, there are conditions such as separating the VCC_HPS and VCC supply sources.

For more information, please refer to the following documents.
https://www.altera.com/en_US/pdfs/literature/an/an734.pdf
(Search for FPGA Portion Power Down.)

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