Intel: Is there a limit to the minimum size of Base Address Register (BAR) that can be configured with PCI-Express IP?

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Intel: Is there a limit to the minimum Base Address Register (BAR) size that can be set with PCI-Express IP?

PCI Express

Category: PCI-Express®
Tools: Quartus® Prime / Quartus II
device:-

There is a minimum size limit for BARs.
The User Guide states:

Supports the following memory sizes:

128 bytes–2 GBytes or 8 EBytes: Endpoint and Root Port variants
6 bytes–4 KBytes: Legacy Endpoint variants

https://www.altera.com/en_US/pdfs/literature/ug/ug_c5_pcie_avst.pdf
(See Base Address Register (BAR) and Expansion ROM Settings section.)

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