Category: Timing Analysis
Tools: Quartus® Prime
Device: MAX®10


The following path will cause a Hold violation, which can be safely ignored.

<From Node>
altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|drdout[*]
<To Node>
altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|drdout[*]

Add the following timing constraint to SDC and set it to FALSE.

<SDC description>
for {set i 0} {$i <= 31} {incr i} {
set cpath "*altera_onchip_flash_block*|drdout[$i]"
set_false_path -from $cpath -to $cpath
}