When you compile a design that includes LVDS macros on a Cyclone V device, you receive the following error message: Clicking the error message on Quartus II displays an automatically generated file for the LVDS macro. How can I avoid the error?

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When I compile a design containing LVDS macros in Cyclone V devices, I get the following error message: Click the error message in Quartus II to view the auto-generated file of the LVDS macros. How can I avoid the error?

<Message>
Error (129036): Output port TXOUT on atom "sample_wrap:inst1|ALT_TX:ALT_TX|altlvds_tx:ALTLVDS_TX_component|ALT_CL_TX_lvds_tx:auto_generated|sd1", which is a cyclonev_ir_fifo_userdes primitive, is not connected to a valid destination

Category: Quartus® Prime / Quartus II
Tool: Quartus Prime / Quartus II
device:-

When using the LVDS_TX macro and assigning one channel of the LVDS output port to multiple output pins, this message may be output and Analysis & Synthesis may fail.
This error can be avoided by connecting the output port of the LVDS macro to a single output pin instead of branching it internally.

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