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I am using a MAX 10 FPGA device and a Temperature Sensing Diode (TSD). Should I input a specified clock such as 40MHz or 20MHz for the input clock to the ADC (Analog to Digital Converters) module?

MAX

Category: IP (Other)
Tools: Quartus® Prime
Device: MAX®10


It does not matter if the clock input to adc_pll_clock of the ADC IP is 2 / 10 / 20 / 40 / 80 MHz.
This clock is divided inside the ADC IP to become a 1MHz clock.
All you have to do is input the frequency set in the IP to adc_pll_clock.

Please also refer to the following documents.
https://www.altera.com/en_US/pdfs/literature/hb/max-10/ug_m10_adc.pdf
(See ALTPLL Parameters Settings section.)

At that time, it is necessary to use the clock output from C0 of the PLL.


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