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How do I handle the CLOCKSEL (CSEL) pin in Cyclone V SoC devices?
SoC FPGAs
Category: Specifications
tool:-
Device: Cyclone® V
CLOCKCSEL (CSEL) determines the frequency of the clock to the memory containing the boot source that boots the Hard Processor System (HPS).
The way the pin should be treated is to pull up with 10kΩ or pull down with 1kΩ.
For more information, see the documentation below.
https://www.altera.com/en_US/pdfs/literature/dp/cyclone-v/pcg-01014.pdf
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