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When using Avalon-ST's PCI-Express (PCIe), the derr_rpl signal becomes Hi-Z in simulation. Is there a way to see the derr_rpl signal in simulation?
PCI Express
IP
Simulation
Category: PCI-Express®
tool:-
device:-
PCIe error signals (derr_*) are debug signals and are not supported in simulation.
It is possible to use only with the actual machine.
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