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How do I set the GPIO pins of my SoC device to Weak Pull-Up?

SoC FPGAs

Category: Specifications
Tools: Quartus® Prime / Quartus II
Device: Arria® V, Cyclone® V


How to set Weak Pull-Up for pins when using GPIO in Hard Processor System (HPS) of Arria V SoC device and Cyclone V SoC device, how to set with Pin Planner and how to set with Assignment Editor There are two types of

<When using Pin Planner>

Launch the Pin Planner (Assignments menu ⇒ Pin Planner) and turn on Weak Pull-up Register for the desired pin row in the Pin Planner's All Pins list.
(If the Weak Pull-Up item is not displayed in the column, you can add the Weak Pull-Up item with Customize Column.)

<When setting with Assignment Editor>

Start the Assignment Editor (Assignments menu ⇒ Assignment Editor) and make the following settings.

From: blank
To: Target I/O pin
Assignment Name: Weak Pull-Up Resistor
Value: On

After setting, check that the Weak Pull-Up of the corresponding GPIO pin is enabled in the compilation report (Fitter ⇒ Resource Section ⇒ All Package Pins) after compiling.

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