Intel: I'm configuring a PCI-Express (PCIe) end port with an FPGA, but is it possible to check the configuration register on the FPGA side via the Avalon-MM Bridge?

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Intel: I am configuring PCI-Express (PCIe) End port with FPGA, but can I check the Configuration Register on the FPGA side via Avalon-MM Bridge?

PCI Express Platform Designer

Category: PCI-Express®
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Basically, it is not possible to check the Configuration Register by End itself.
The only confirmation method is Configuration TLP from the root side.

For details, refer to the document below.
https://www.altera.com/en_US/pdfs/literature/ug/ug_a10_pcie_avmm.pdf
(Search for Control Register Access (CRA) Avalon-MM Slave Port.)

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