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How can I simulate Qsys-based PCI-Express Endpoint Avalon-ST designs on Arria V GZ devices?

PCI Expresssimulation

Category: PCI-Express®
Tools: ModelSim®
Device: Arria® V


A sample Qsys design and simulation model are provided in the Quartus II installation directory.
You can use it to simulate PCI-Express with End Point.

The procedure is as follows.

[procedure]

  1. Quartus II のインストール・ディレクトリに格納されている example_designs ディレクトリを選択してください。

    (例)
    <install_dir>/ip/altera/altera_pcie/altera_pcie/altera_pcie_avgz_hip_avmm/

  2. Copy the .qsys file starting with ep to your working directory.

  3. After starting Qsys, select File menu ⇒ Open ⇒ .qsys, then select Generate menu ⇒ Generate Testbench System, then set the following and select Generate.

    Create testbench Qsys system ⇒ Standard,BFMs for standard Qsys interfaces
    Create testbench simulation model ⇒ Verilog
    Allow mixed-language simulation ⇒ Turn this option off

  4. Start ModelSim and move to the following directory with File menu ⇒ Change Directory.

    <working directory>/ep*/testbench/mentor
      
  5. Select msim_setup.tcl from ModelSim's Tools menu ⇒ Tcl ⇒ Execute Macro.. and type ld_debug in the Transcript window to run it.

  6. Right-click ep*_tb from the Sim window (Sim tab) and select Add_Wave to set the waveform to observe.

  7. Type run -all to start the simulation.


* You can also perform simulations with ModelSim-Altera Edition and ModelSim-Altera Starter Edition.
* This method is for v14.0. Other versions may differ slightly.

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