Analog Devices A/D converter (ADC) : Is it okay to use AD7891 parallel mode operation (Fig.2 in the data sheet) at the timing when RD or WR falls low before CS?
No, it will be a problem. In the AD7891 data sheet, the setup time between CS falling edge and RD/WR falling edge is 0 nS. It is permissible to bring them down at the same time. However, the timing at which RD or WR falls low before CS is not specified (guaranteed). Use it under the condition that the falling edge of CS does not lag behind the falling edge of RD/WR.
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