I am using Analog Devices Clock/Data Recovery: ADN2814, but what should I be careful about when selecting the capacitor between CF1 and CF2, which is part of the loop filter of the PLL for Data Recovery?

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Analog Devices Clock/Data Recovery: I am using the ADN2814, what should I be careful about when selecting the capacitor between CF1 and CF2 that is part of the loop filter of the PLL for Data Recovery?

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A capacitor selection method is described on the ADN2812 Evaluation Board (AN-657).
The capacitance should be 0.47uF (>6.3 V, ±20%). As a point of caution, select a capacitor of 10 nA or less with a small leakage current.

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