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I want to achieve LVDS_RX in MAX 10 devices, is the 100 Ω differential termination resistor built into the FPGA?
MAX
Device Family: MAX® 10
Category: I/O
MAX 10 devices do not support 100Ω on-chip termination within the FPGA for differential input pins. An external resistor must be provided.
For further details, please refer to the MAX 10 High-Speed LVDS I/O User Guide below.
Figure 17. External Termination for LVDS, 1.8 V LVDS, Mini-LVDS, and RSDS I/O Standards
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