Altera: I want to use bidirectional pins. I want to write it in VHDL, but how should I write it?

Narrow down by specifying conditions

現在 4342 件がヒットしています。

Altera: I want to use bidirectional pins. I want to write it in VHDL. How can I write it?

A description example is shown below, so please use it after modifying it.
a , b and c are usually connected to Logic.

*************
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY TOP2 IS
PORT (
a : IN STD_LOGIC; -- Output Data Signal (to INOUT pin)
en : IN STD_LOGIC; -- Output Enable Signal
b : INOUT STD_LOGIC; -- INOUT Port
c : OUT STD_LOGIC -- Input Signal (from INOUT pin)
);
END TOP2;

ARCHITECTURE rtl OF TOP2 IS
BEGIN
b <= a WHEN en = '1' ELSE 'Z';
c <= b ;
END rtl;
*************

Related technical information/FAQ

Experienced FAE
Free consultation is available.

From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.

Inquiry form

Site Search

Related technical information/FAQ