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Altera: I want to simulate a design including a schematic using Questa Sim, but it's not working.

Category: Simulation
Tools: Quartus® II, ModelSim®, Quartus® Prime, Questa Sim
device:-


Since Questa Sim is a language simulator, it cannot directly simulate designs that include schematics (BDF files).
Quartus II / Quartus Prime has a function to convert schematics (BDF files) into a language (Verilog-HDL or VHDL).
You need to convert it first and then run the simulation.

<File Conversion Procedure>

  1. Open the circuit diagram to be converted in Quartus II / Quartus Prime.
  2. Select File menu ⇒ Create / Update ⇒ Create HDL Design File from Current File.
  3. Select a language (Verilog-HDL or VHDL) and click OK.

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