[On-demand seminar] How to properly design and measure SiC FET <Free>

[On-demand seminar] How to correctly design and measure SiC FET <Free>

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Event features

How to properly design and measure SiC FETs

The market demands high efficiency, high power density, and system simplicity. SiC semiconductors are extremely useful products to meet these market demands. In order to maximize the effectiveness of Qorvo's SiC FET (formerly United SiC) products, we will introduce how to properly design and measure them.

This on-demand seminar is one of the previously held seminars, especially since it contains the information necessary for designing with SiC semiconductors. We believe this seminar will be useful for customers considering SiC semiconductors, so please take this opportunity to participate.
Please refer to the "Agenda" for the seminar content.

[Held: 2/13-3/29] This is an on-demand video, so please watch it when you have time during the period. We look forward to your participation!

Note: This on-demand video is an on-demand version of a past seminar, so the company name and logo of the former United SiC are used. We are currently developing and manufacturing SiC products at Qorvo.

Recommended for people like this!

・Those who are considering replacing power semiconductors from silicon to SiC
・Those who are considering using SiC for power semiconductors from now on
・Those who have previously encountered issues when considering SiC

Schedule/Application

schedule	time	venue	Capacity	Application
2024/02/13 (Tue) ~ 2024/03/29 (Fri)	Video - 30 minutes each	You can watch it on your own PC anytime until March 29th (Applications start from February 13th)	Unlimited	End of reception

agenda

time	content
about 30 minutes	How to minimize both EMI and switching losses in SiCFETs 1.Turn-off VDS spike when using high-speed SiC devices 2.Causes and possible remedies 3. Snubber circuit vs Rgoff resistor effect switching loss 4.Summary
about 30 minutes	In order to measure SiC correctly 1. Representative characteristics to be evaluated in experiments EON/EOFF/QRR 2. What kind of experiment should I do? 3. Differences in probes and environments in actual evaluation (voltage) differential probe, passive probe, optical isolation probe (Current) Differences between Rogowski probe, coaxial shunt resistance, and CT Snubber circuit position Voltage and current skew adjustment 4. VGS positive surge and negative surge when switching 5.QORVO's SiC FET product introduction 6.Summary

time

content

about 30 minutes

How to minimize both EMI and switching losses in SiCFETs

1.Turn-off VDS spike when using high-speed SiC devices
2.Causes and possible remedies
3. Snubber circuit vs Rgoff resistor
effect
switching loss
4.Summary

about 30 minutes

In order to measure SiC correctly

1. Representative characteristics to be evaluated in experiments
EON/EOFF/QRR
2. What kind of experiment should I do?
3. Differences in probes and environments in actual evaluation
(voltage) differential probe, passive probe, optical isolation probe
(Current) Differences between Rogowski probe, coaxial shunt resistance, and CT
Snubber circuit position
Voltage and current skew adjustment
4. VGS positive surge and negative surge when switching
5.QORVO's SiC FET product introduction
6.Summary

Organized and operated

Macnica Ultima Company

Notes

・Participation of competing manufacturers and agents may be refused. Thank you for your understanding