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Product Summary
Parade Technologies' PCI Express® (PCIe®) Gen6 devices support PCIe Gen6 up to 64GT/s with PAM4 modulation.
Product main features
- Supports PCIe Gen6 up to 64GT/s with PAM4 modulation
- Supports various PCIe power saving states
- Equipped with a programmable equalizer up to 18dB
Product lineup
PS8596
The PS8596 is a bidirectional 16-lane PCIe linear redriver supporting PCIe Gen6 data rates up to 64GT/s using PAM4 modulation. It features a built-in programmable equalizer to compensate for signal loss due to board traces and cables, maintaining excellent linearity to ensure signal transparency during PCIe link training and maintain signal integrity (SI). It also features an auto-skill function that switches the output to the common-mode voltage when the input signal falls below the threshold, preventing unwanted signal retransmission.
The PS8596 also offers comprehensive power-saving features, fully supporting PCIe power-saving modes (L0s, L1, and deeper power-saving states L1.1 and L1.2). Transitions to these modes are controlled through the system-connected CLKREQB pin. Furthermore, per-channel power management automatically transitions idle lanes into low-power modes and immediately resumes upon detecting a valid signal. Configurations can be programmed via SMBus/I²C or loaded from an external EEPROM. The combination of high linearity, advanced equalization, and granular power management makes the PS8596 ideal for high-bandwidth, low-power applications in PCIe Gen6 platforms, such as servers and data centers.
■ Features & block diagram
2.5GT/s, 5.0GT/s, 8.0GT/s, 16.0GT/s, 32.0GT/s and 64GT/s (PAM4)
Supports PCIe operation with
16 bidirectional lanes supporting all link bifurcation configurations
Supports PCIe link training and power management
- Supports various PCIe power saving states
- L1 and L0s: Standby mode
- L1.1 and L1.2: Sleep mode
- Built-in automatic skill check function
- Equipped with a programmable equalizer up to 18dB
- Supports CXL3.0 with ultra-low latency
- Built-in AC coupling capacitor on the transmitter side
Supports configuration via SMBus/I²C and external EEPROM
・Operates from a single 2.5V power supply
・ESD resistance: 4KV (HBM), 2KV (CDM)
8.9mm x 22.8mm 354-ball BGA package
- Ball map and pin compatibility with Intel PCIe 6.0 standard
■ Target applications
·server
・Data centers
Workstation
・Storage devices
PS8598
The PS8598 is a bidirectional 8-lane PCIe linear redriver supporting PCIe Gen6 data rates up to 64GT/s using PAM4 modulation. It features a built-in programmable equalizer to compensate for signal loss due to board traces and cables, maintaining excellent linearity to ensure signal transparency during PCIe link training and maintain signal integrity (SI). It also features an auto-skill function that switches the output to the common-mode voltage when the input signal falls below the threshold, preventing unnecessary signal retransmission. Its low-power design eliminates the need for a heatsink, simplifying system design and reducing bill-of-materials (BoM) costs.
The PS8598 also offers comprehensive power-saving features, fully supporting PCIe power-saving modes (L0s, L1, and deeper power-saving states L1.1 and L1.2). Transitions to these modes are controlled through the system-connected CLKREQB pin. Furthermore, per-channel power management automatically transitions idle lanes into low-power modes and immediately resumes them upon detecting a valid signal. Configurations can be programmed via SMBus/I²C or loaded from an external EEPROM. The combination of high linearity, advanced equalization, and granular power management makes the PS8598 ideal for high-bandwidth, low-power applications in PCIe Gen6 platforms, such as servers and data centers.
■ Features & block diagram
2.5GT/s, 5.0GT/s, 8.0GT/s, 16.0GT/s, 32.0GT/s and 64GT/s (PAM4)
Supports PCIe operation with
- 8 bidirectional lanes supporting up to 16 link configurations
Supports PCIe link training and power management
- Supports various PCIe power saving states,
Total power consumption in sleep mode is 1mW
- L1 and L0s: Standby mode
- L1.1 and L1.2: Sleep mode
- Built-in automatic skill check function
- Equipped with a programmable equalizer up to 18dB
- Supports CXL3.0 with ultra-low latency
- Built-in AC coupling capacitor on the transmitter side
Supports configuration via SMBus/I²C and external EEPROM
・Operates from a single 2.5V power supply
・No heat sink required
・ESD resistance: 4KV (HBM), 2KV (CDM)
8.9mm x 13.2mm 211-ball BGA package
- Ball map and pin compatibility with Intel PCIe 6.0 standard
■ Target applications
·server
・Data centers
Workstation
・Storage devices
PS8594
The PS8594 is a bidirectional 4-lane PCIe linear redriver supporting PCIe Gen6 data rates up to 64GT/s using PAM4 modulation. It features a built-in programmable equalizer to compensate for signal loss due to board traces and cables, maintaining excellent linearity to ensure signal transparency during PCIe link training and maintain signal integrity (SI). It also features an auto-skill function that switches the output to the common-mode voltage when the input signal falls below the threshold, preventing unnecessary signal retransmission. Its low-power design eliminates the need for a heatsink, simplifying system design and reducing bill-of-materials (BoM) costs.
The PS8594 also offers comprehensive power-saving features, fully supporting PCIe power-saving modes (L0s, L1, and deeper power-saving states L1.1 and L1.2). Transitions to these modes are controlled through the system-connected CLKREQB pin. Furthermore, per-channel power management automatically transitions idle lanes into low-power modes and immediately resumes them upon detecting a valid signal. Configurations can be programmed via SMBus/I²C or loaded from an external EEPROM. The combination of high linearity, advanced equalization, and granular power management makes the PS8594 ideal for high-bandwidth, low-power applications in PCIe Gen6 platforms, such as servers and data centers.
■ Features & block diagram
2.5GT/s, 5.0GT/s, 8.0GT/s, 16.0GT/s, 32.0GT/s and 64GT/s (PAM4)
Supports PCIe operation with
- 4 bidirectional lanes supporting up to 16 link configurations
Supports PCIe link training and power management
- Supports various PCIe power saving states,
Total power consumption in sleep mode is 1mW
- L1 and L0s: Standby mode
- L1.1 and L1.2: Sleep mode
- Built-in automatic skill check function
- Equipped with a programmable equalizer up to 18dB
- Supports CXL3.0 with ultra-low latency
- Built-in AC coupling capacitor on the transmitter side
Supports configuration via SMBus/I²C and external EEPROM
・Operates from a single 2.5V power supply
・No heat sink required
・ESD resistance: 4KV (HBM), 2KV (CDM)
・8.9mm x 8.4mm 139-ball BGA package
- Ball map and pin compatibility with Intel PCIe 6.0 standard
■ Target applications
·server
・Data centers
Workstation
・Storage devices
PS8592
The PS8592 is an 8-channel unidirectional PCIe linear redriver supporting PCIe Gen6 data rates up to 64GT/s (PAM4). It features a built-in programmable equalizer to compensate for signal loss due to board wiring and cables, maintaining excellent linearity to ensure signal transparency during PCIe link training and maintain signal integrity (SI). It also features an auto-skill function that switches the output to the common-mode voltage when the input signal falls below the threshold, preventing unnecessary signal retransmission. Its low-power design eliminates the need for a heatsink, simplifying system design and reducing bill-of-materials (BoM) costs.
The PS8592 also offers comprehensive power-saving features, fully supporting PCIe power-saving modes (L0s, L1, and deeper power-saving states L1.1 and L1.2). Transitions to these modes are controlled via the system-connected CLKREQB pin. Furthermore, per-channel power management automatically transitions idle channels into low-power modes and immediately resumes upon detecting a valid signal. Configurations can be programmed via SMBus/I²C or loaded from an external EEPROM. With its high linearity, advanced equalization, and granular power management, the PS8592 is ideal for high-bandwidth, low-power applications in PCIe Gen6 platforms, such as servers and data centers. Furthermore, its channel-based architecture also enables AI cable optimization, enabling independent re-drivers at both ends of a bidirectional link for maximum performance.
■ Features & block diagram
2.5GT/s, 5.0GT/s, 8.0GT/s, 16.0GT/s, 32.0GT/s and 64GT/s (PAM4)
Supports PCIe operation with
Eight unidirectional channels for up to 8 or 16 link configurations
Supports PCIe link training and power management
- Supports various PCIe power saving states,
Total power consumption in sleep mode is 1mW
- L1 and L0s: Standby mode
- L1.1 and L1.2: Sleep mode
- Built-in automatic skill check function
- Equipped with a programmable equalizer up to 18dB
- Supports CXL3.0 with ultra-low latency
- Built-in AC coupling capacitor on the transmitter side
Supports configuration via SMBus/I²C and external EEPROM
・Operates from a single 2.5V power supply
・No heat sink required
・ESD resistance: 4KV (HBM), 2KV (CDM)
5.2mm x 10.5mm 136-ball BGA package
■ Target applications
·server
・Data centers
Workstation
・Storage devices
・AI cable
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