FL1100LX

Single-chip PCI Express® to USB3.2 Gen1 host controller. Fully integrated Extensible Host Controller Interface (xHCI) engine, 5Gbps USB3.2 Gen1 transceiver, PCI Express® endpoint controller, and 1-lane 5Gbps PCI Express® transceiver. It implements Universal Serial Bus 3.0 Specification Revision 1.0 and xHCI Specification Revision 1.0, is compliant with PCI Express® Revision 2.1 at 5Gbps data rate, and is backward compatible with PCI Local Bus Specification Revision 2.2. It is also compatible with working with USB2.0 and USB1.1 devices.

Adding the FL1100LX to any PCI Express®-based platform provides one high-performance USB port for any USB application, including video displays, high-definition cameras, high-performance storage, and countless other devices. It supports the USB debug function defined by the xHCI Specification. The debug feature enables low-level system debugging using a USB-to-USB connection between two computers. This debugging capability is a Microsoft requirement.

■ Block diagram

FL1100SX

2-port USB3.2 Gen1 host controller. It features a hardware-based multi-stream, multi-thread parallel processing engine that delivers full bandwidth to each USB3.2 Gen1 port, further optimized for simultaneous operation of multiple devices. With no firmware and high level of integration, system integration is easier and faster, resulting in lower TCO.

Compliant with Extensible Host Controller Interface (xHCI) 1.0, ensuring your system has the best compatibility now and in the future. It sets performance standards while delivering even lower power consumption. It has two USB3.2 Gen1 downstream ports in a 100-pin, 6mm x 6mm footprint TFBGA package.

Optimized performance when operating multiple protocols

Hardware-based accelerator routers provide access to ample best-effort bandwidth while minimizing latency and protecting high-bandwidth real-time data streams. For users, this means fast backups even when watching high-definition video or other high-bandwidth real-time applications.

Fully compliant with UASP requirements

It fully supports the UASP (USB Attached SCSI Protocol) standard, the next generation storage protocol designed for USB3.2 Gen1. This feature optimizes the transfer efficiency of 5Gbps channels by eliminating some of the classic BOT (Bulk-Only Transport) bottlenecks.

Hardware-based LPM support

It also supports hardware-based LPM (Link Power Management). If a USB2.0 LPM capable device is attached, it will automatically negotiate with the device to enter a low power state. This allows the system to manage link power more effectively and allows the host CPU to stay asleep for longer periods of time by eliminating software intervention. This can result in power savings that are orders of magnitude greater than the link power savings alone.

USB charging support

Complies with Battery Charging (BC) Specification Revision 1.2: Charging Downstream Port (CDP) and China Charging YD/T 1591-2009 standards. The FL1100SX's unique Hybrid Charging Mode automatically identifies BC-compliant or China Charging devices and handshakes accordingly. With proper power supply design, system designers can easily support USB charging without additional discrete USB charging components.

Support for USB debugging function

It supports the USB debug function defined by the xHCI Specification. The debug feature enables low-level system debugging using a USB-to-USB connection between two computers. This debugging capability is a Microsoft requirement.

■ Block diagram

■ Block diagram

Parade Technologies Manufacturer Information Back to Top

Parade Technologies Manufacturer Information If you would like to return to the top page, please click below.