Features of the seminar
Soft error measures using FD-SOI process
Conventionally, the fields that required soft error countermeasures were mainly for aerospace and communication infrastructure, but recently, fields that require high-performance arithmetic processing, industrial equipment, infrastructure systems, and autonomous driving in vehicles. Measures against soft errors are required.
On the other hand, since soft errors are difficult to reproduce, it was difficult to conduct sufficient verification at the development stage. As soft errors have become widely known, methods for evaluating and verifying them at the system development stage have been established, and it has become possible to incorporate countermeasures such as error detection, correction, and redundancy into systems. I'm here.
In this seminar, we will explain the soft error countermeasures in Lattice's Nexus series using the FD-SOI process through the details of the FD-SOI process and the actual SED/SEC demonstration.
[Participation benefits] For those who have answered the questionnaire after watching, we will give you this lecture material (PDF)!
*This seminar is a sequel to the seminar below, so if you have not watched it yet, we recommend that you watch it first.
[On-Demand Seminar] Find out in 15 minutes! Basics of Soft Errors and Countermeasures <Free>
Recommended for people like this!
・ Those who want to know the countermeasure method for soft errors that are essential for FPGA
・ Those who want to know the reliability of the FD-SOI process
agenda
| time | content |
| about 15 minutes |
Soft error measures usingFD-SOI process 1. Importance of measures against soft errors 2. Efforts during product development 3. What is FPGA for FD-SOI process? 4. About SED/SEC 5. Radiation-induced hard error concerns and FD-SOI tolerance |
Application
Instructor profile
Lattice Semiconductor FAE
Katsuo Sakajiri
FPGAエンジニアとして25年間 設計/販売業務に従事
Qualified with ISO26262/IEC61508 Engineer Certificates
Organized and operated
Sponsor: Macnica
Sponsored by: Lattice Semiconductor
Notes
Participation by competitors may be refused. Thank you for your understanding.