FPGA & SoC FPGA with highest performance at 20nm
Arria ® 10 FPGAs & SoCs deliver the highest performance at 20nm, offering a performance advantage over competitive devices by one speed grade. It also features the industry's only hardened floating-point DSP that consumes up to 40% less power than previous generation mid-range FPGAs & SoCs and delivers up to 1,500 GFLOPS of processing performance.
Best performance at 20nm with Arria 10 FPGA & SoC
- 1 speed grade faster than competing FPGAs & SoCs
- Industry's only mid-range FPGA supporting 25.78 Gbps
- Highest performance 2400 Mbps DDR4 SRAM memory interface
- Hardened IEEE 754 Compliant Floating Point Arithmetic Delivering 1,500 GFLOPS DSP Performance
- 96 transceiver lanes, providing 3.3 Tbps of serial bandwidth
40% less power than previous generation FPGA & SoC
- Programmable Power Technology reduces static power consumption by selecting lower power transistors for paths where performance is not critical
- Smart Voltage ID allows device to operate at optimum voltage without impacting performance
- VCC Power Manager - User selectable trade-off between performance and power consumption with operating voltage
- Low Static Power Grade - Provides devices with reduced static power consumption
Download the latest version of the Quartus Prime development software
Download Arria 10 Documentation
Arria 10 FPGA & SoC Applications
Industry's only 20nm ARM-based SoC FPGA
- Offers multiple SoC devices with dual-core ARM Cortex TM-A9 HPS
- CPU running at 1.5 GHz per core
- Migrate from 28nm SoC FPGA Arria V to Arria 10 without changing processor code
Saves board space through integration
- Twice the density of previous generation midrange products with over 1 million logic elements
- Hardened Intellectual Property: DDR4 Memory Controller and PCI Express ® (PCIe ®) 3.0 Specification (Gen3)
- Enpirion ® PowerSoC Enhances Arria 10 FPGA & SoC with Smallest Footprint, Highest Performance, Lower System Power Consumption, Improved Reliability and Efficiency, and Faster Time-to-Market
Increase Productivity and Reduce Time-to-Market with Altera's Quartus II Development Software
- Industry's fastest 20nm compile times and most advanced design environment
- Low latency best-in-class IP cores including 100G Ethernet, 100G Interlaken, PCIe Gen3
- Industry's fastest compile times (up to 2.5x faster than the closest competitor) for faster design iteration and timing closure
- C-based design entry using Altera's SDK for OpenCL™, providing an easy-to-implement design environment for FPGAs
- System-level design environment with Qsys system integration tools
- DSP Builder - A model-based DSP environment within the MATLAB/Simulink environment
Table 1. Arria 10 Varieties
Breed | explanation |
Arria 10GT | Supports up to 25.78 Gbps chip-to-chip data rate, 12.5 Gbps backplane data rate, up to 96 full-duplex transceivers, up to 1.15 million LE equivalent FPGA |
Arria 10GX | Up to 96 full-duplex transceivers supporting chip-to-chip data rates up to 17.4 Gbps and backplane data rates up to 12.5 Gbps; FPGA worth up to 1.15 million LEs |
Arria 10SX |
Dual-core ARM Cortex-A9 HPS, up to 48 full-duplex transceivers with chip-to-chip data rates up to 17.4 Gbps, backplane data rates up to 12.5 Gbps, SoC worth up to 660,000 LEs |
Figure 1: Arria 10 FPGA architecture
Arria 10 FPGAs & SoCs are ideal for a wide range of applications in wireless communications, wireline communications, military equipment, broadcast equipment, and other end markets.
Related links ( ALTERA site)
- White Paper: Altera Generation 10 Products Meet the Performance and Power Requirements of the Zettabyte Era (PDF)
- White Paper: What Breakthroughs Will Next-Generation FPGAs Bring? (PDF)
- Start guide
- Family overview
- Application example
- Overview of Serial Transceivers
- Arria 10 Device Overview (English/PDF)
- Understanding hardened floating-point DSPs