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Digital isolator and photocoupler technology
Digital isolator parameters and definitions
Different end product applications require different digital isolator parameters. The parameters to be emphasized change depending on the purpose of the designer. For example, designers may prefer CMTI over low power operation when used in noisy industrial environments. Precision ADC applications may value low jitter performance over pulse width distortion. As such, designers often verify several key parameters independently, depending on the application.
This article lists definitions of parameters (specifications) for general isolators.
| Digital isolator parameters | Symbol | definition |
| Channel-to-Channel Skew channel-to-channel skew |
tPSK | Propagation delay time difference between channels in a multi-channel isolator |
| Common-Mode Transient Immunity Common-mode transient immunity |
CMTI | Ability to remove fast fluctuations in common mode |
| Device Startup Time Device startup time |
t SU | Time from power ON to normal operation of isolation element |
| Input High, Low Thresholds Input Hi/Low threshold |
VIH, VIL | Voltage threshold that the input Hi or Low level must exceed |
| Input leakage current Input leakage current |
IL | Parasitic leakage current flowing into pins on the input side |
| Input-Side Bias Current Input side bias current |
IDDI | Bias current flowing in the circuit on the input side of the digital isolator |
| Jitter jitter |
tjIT (pk) | Variation of pulse edge of data signal |
| Undervoltage Lockout (UVLO) |
UVLO | Bias level on VDD to enable/disable operation of the digital isolator |
| Maximum Data Rate Maximum data rate |
Dmax | Maximum signal speed of digital isolator (usually defined in Mbps) |
| Minimum Pulse Width Minimum pulse width |
t(min) | Minimum signal pulse width that a digital isolator can detect |
| Output Impedance output impedance |
Zout | Output impedance (usually measured in ohms) |
| Output Rise, Fall Times Output rise/fall time |
tr, tf | Time for output to rise from 10% to 90% of VDD or fall from 90% to 10% of VDD |
| Output Voltage High, Low output voltage |
VOH, VOL | Output threshold level defining logic 1 and 0 |
| Output-Side Bias Current Output bias current |
IDDI | Bias current flowing to the output side of the digital isolator |
| Propagation Delay delay time |
t PHL, t PLH | Propagation time from input event to output of digital isolator |
| Propagation Delay Skew delay time skew |
tPSK (pp) | Difference between minimum and maximum propagation delays for isolators operating under identical conditions |
| Pulse Width Distortion pulse width distortion |
PWD | Difference between Hi to Low Propagation Delay and Low to Hi Propagation Delay |
Isolator product page
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