Ethernet hardware configuration

The physical layer in Ethernet is specified in various ways, such as coaxial cable, twisted pair cable, and optical fiber cable, depending on the transmission distance and communication speed. In order to efficiently connect these differences in physical connection specifications, it is divided into a physical layer (Layer 1 (PHY)) and a logical layer (Layer 2 (MAC)). MII is a standard interface defined for the purpose of connecting this physical layer (Layer 1) and logical layer (Layer 2).

MII (Media Independent Interface) is equivalent to the AUI of the 10BASE standard and was defined in the ``IEEE 802.3u'' of 100 Mbps Ethernet, but MII corresponding to 10 Mbps and 100 Mbps, GMII corresponding to 1000 Mbps (1 Gbps), 10 Gbps There is XGMII that supports .

Next, I will briefly explain MII, RMII, GMII, and RGMII.

MII (Media Independent Interface)

MII (Media Independent Interface) has a clock and 4-bit wide data bus for transmission and reception respectively. Generated by PHY.

25MHz (clock frequency) x 4bit (data path) = 100Mbps is achieved.

(2.5MHz (clock frequency) x 4bit (data path) = 10Mbps)

RMII (Reduced Media-Independent Interface)

RMII (Reduced Media-Independent Interface) is a standard developed to reduce the number of signals connecting PHY and MAC. 100Mbps communication is achieved with a 50MHz clock (100Mbps/10Mbps both operate at 50MHz) and a 2-bit wide data bus.

50MHz (clock frequency) x 2bit (data path) = 100Mbps is achieved.

GMII (Gigabit Media-Independent Interface)

GMII (Gigabit Media-Independent Interface) has a 125MHz clock and an 8-bit wide data bus for transmission and reception, realizing a maximum communication speed of 1000 Mbps.

125MHz (clock frequency) x 8bit (data path) = 1000Mbps is achieved.

RGMII (Reduced Gigabit Media-Independent Interface)

RGMII (Reduced Gigabit Media-Independent Interface) cuts the data bus of GMII in half. At 1000Mbps data is sent on both the rising and falling edges of the clock. At 10/100Mbps, data is only sent on the rising edge of the clock.

125MHz (clock frequency) x 4bit (data path) x 2 = 1000Mbps.

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