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Background to the need for cost reduction in microcontrollers and IPDs
As the trend toward E/E architecture for SDV (Software Defined Vehicle) gains momentum, the integration of automotive ECUs is progressing. As a result, the number of IPDs (Intelligent Power Devices) used in Zone/Area ECUs and PDBs is increasing, and the microcontrollers that control IPDs are facing the following challenges:
・Total costs are on the rise due to the increase in IPD points
・Due to the lack of GPIO on the microcontroller, you are forced to consider using a more expensive microcontroller or upgrading the package.
・Latency increases as the number of IPDs increases
The above issues can be resolved by controlling the IPD with a Lattice FPGA.
Below we propose some specific benefits of adopting FPGA.
Three points that can be solved with Lattice FPGA
We will introduce solutions that are only possible with Lattice FPGAs, which have a large number of IOs even in small-capacity FPGAs.
1. IPD cost reduction and simplification of IPD functions
By incorporating some of the functions (IT: time tolerance for current value) built into expensive IPDs into FPGA, you can use cheaper IPDs.
2. Microcontroller cost reduction: Microcontroller package size reduced by I/O expansion
By expanding GPIO using FPGA, the number of I/Os on the microcontroller can be reduced, allowing for the use of a microcontroller in a smaller package, which also leads to cost reductions on the microcontroller side.
3. Reducing the number of microcontroller components: FPGA parallel processing enables low-latency IPD control
FPGAs can simultaneously control multiple IPDs using hardware, resulting in significantly lower latency than software processing. They can respond quickly to IPD status changes, making them ideal for Zone/Area ECUs and PDBs, which require real-time performance. Furthermore, because FPGAs can constantly monitor and control IPDs, they can achieve functionality without being affected by the microcontroller's sleep mode.
Zone FPGA Utilization Examples Optimal for ECU and PDB
The block diagram of the configuration example is as follows:
Target application: PDB (Power Distribution Box)
【assignment】
・The number of I/Os in the microcontroller is insufficient, so an external MUX or other device must be implemented.
[Solution]
- Solves the problem of insufficient GPIO
・Cost reduction by replacing with a small microcomputer
・Reduce IPD costs by offloading some IPD functions to FPGA
Target application: Zone ECU
【assignment】
- Insufficient number of I/Os in the microcontroller
- High-speed I/F increases processing capacity
- Significant increase in microcomputer costs
[Solution]
- Solves the problem of insufficient GPIO
・Cost reduction by replacing with a small microcomputer
・Reduce IPD costs by offloading some IPD functions to FPGA
- I/F bridge function also realized on one chip
ADAS and Information Zone ECUs in particular are increasingly supporting high-speed interfaces such as MIPI, PCIe, and LVDS.
By utilizing FPGA, not only can you reduce the cost of the microcontroller/IPD and address the I/O shortage of the microcontroller, but you can also convert and integrate various I/Fs on a single chip.
Detailed block diagram and specific FPGA model number proposal
For a specific introduction to FPGAs, detailed block diagrams, and how to incorporate I2T functions, please download the materials below.