What is the MIPI standard? Physical layer (D-PHY) and protocol layer (DSI/CSI-2)

First, let's learn what kind of standard MIPI is!

MIPI is an abbreviation for Mobile Industry Processor Interface, and is a standard established in 2005 by the standardization body MIPI Alliance.

This interface is mainly used for camera-related products such as smartphones, industrial equipment, and automotive applications.

MIPI can be divided into physical layer and protocol layer. The physical layer includes D-PHY, M-PHY, C-PHY, and A-PHY.

Each is as shown in the figure below.

This time, because I want to finally verify with the actual machine with Lattice FPGA

I would like to learn more about MIPI D-PHY that Lattice supports.

There are two types of protocols in MIPI D-PHY, each with different uses.

CSI-2 is a protocol that is often used around cameras, and DSI is a protocol that is often used around displays.

What is D-PHY? Does the configuration change with DSI/CSI-2? ~

First, let's study D-PHY!

Is there a difference in DSI/CSI-2? I would like to deepen my understanding of D-PHY by comparing it with LVDS.

D-PHY is the physical layer, and each configuration of DSI/CSI-2 is as follows.

First, the DSI configuration. Basically 1 lane for clock and 1, 2, 4 data lanes for data.

Both will be differential signals and the clock will be DDR operation.

Next is the configuration of CSI-2. The configuration of D-PHY is the same as that of DSI.

So what is the difference?

The DSI/CSI-2 difference has a difference in Data Lene0. DSI seems to be able to bi-directionally communicate with DataLane0!

DSI can communicate with Slave devices using this Data Lane0.

The configuration of D-PHY is DSI/CSI-2 Basically the configuration is the same, the only difference is that Data Lane 0 becomes bi-directional communication in DSI!

What is D-PHY? Electrical Characteristics and Transfer Modes

Next, I would like to learn about the electrical characteristics of D-PHY.

D-PHY seems to have two transmission modes, Low Power (LP) Mode / High Speed (HS) Mode.

Data is output as a single-ended output with 1.2V amplitude in LP Mode and as a differential output with ±200mV amplitude in HS Mode.

So why are there two modes? Let's look at the waveform during the transfer below.

I would like to learn more about the above waveforms in the next installment.

As far as this waveform is concerned, it seems that data transfer is performed by switching between LP Mode and HS Mode.

The transmission distance is 30 cm, and the data transmission speed is HS: Max 2.5 Gbps, LP: Max 10 Mbps.

Data is output as a single-ended output with 1.2V amplitude in LP Mode and as a differential output with ±200mV amplitude in HS Mode.

It turns out that communication is performed by switching LP/HS!

D-PYH seems to be a point that this LP-HS can be switched in the chip.

Compared to other standards, it may give you a better image.

Compare the difference between LVDS and MIPI communication!

What is D-PHY ~Comparison with LVDS~

I have heard about LVDS several times since I joined the company, and I am more familiar with communication than MIPI.

However, I don't know the details, so I thought it would be useful to study this time, so I made a comparison table!

From the above table, we can see that MIPI can communicate faster than LVDS even though the transmission distance is shorter!

I didn't know that LVDS can communicate with Max10m, so I learned a lot by comparing them.

This is the end of our study for today. From next time, we will take a closer look at each of the MIPI DSI/CSI-2 protocol layers!

lastly:

My impression is that the physical layer (D-PHY) is not much different from DSI/CSI-2, and I got a better image by comparing it with LVDS!

If the physical layer doesn't change that much, will there be a big difference in the protocol layer? Hiromin expected.

Well, see you next time in Part 2, MIPI DSI Part 1! Bye!