Heat problem of FPGA accompanying high speed data communication

While the development of products that require high-speed communication and high-performance processing such as PCIe, SLVS-EC, and CXP is increasing,

In terms of product concepts, I think many people prefer to use FPGAs because of their processing speed.
　
However, as a result of designing an FPGA that achieves high-speed communication, power consumption and heat generation have increased considerably.

Have you ever had a hard time dealing with heat dissipation?

In particular, countermeasures against heat problems are essential for products that come into contact with people and product designs that cannot be provided with a heat dissipation mechanism.

As a countermeasure, there are methods such as installing a heat sink or a fan.

However, there is still the possibility that the range of product planning will be narrowed due to increased costs and physical restrictions on the product housing.

In order to solve the heat problem, it is fundamentally necessary to suppress the heat generated by the IC.

FD-SOI process to solve heat problem

One way to do this is to use FD-SOI-based ICs.

FD-SOI is a process technology characterized by low power consumption and low heat generation.

I will keep it brief here, but FD-SOI uses a “buried oxide film” and an “ultra-thin silicon film”.

It features a planar transistor.

The buried oxide film makes the flow of electrons between the source and drain efficient.

As a result, the ultra-thin silicon film eliminates the need for ON/OFF control of the transistor, and can greatly reduce leakage current.

From here, we will introduce the characteristics of FPGAs configured with FD-SOI and comparisons with each FPGA vendor.

1. Market comparison between FD-SOI and FinFET

2. Comparison of power consumption and heat generation between FD-SOI and FinFET in FPGA

1. Market comparison between FD-SOI and FinFET

FinFET vs FD-SOI Market Comparison

 

 

FPGAs have been widely adopted in markets such as high-performance computing, server equipment, industrial equipment, and medical equipment.

 

FPGAs made of FD-SOI are characterized by excellent power efficiency and low heat dissipation.

Therefore, it is attracting attention from medical equipment that comes into contact with people and industrial equipment that continues to operate for a long time.

 

In addition, battery-powered mobile devices and IoT devices, which have not been able to actively use FPGAs in the past due to their power consumption, are starting to attract attention.

 

On the other hand, FPGAs made up of FinFETs have a large amount of logic and have excellent processing power.

It can be said that FinFET is more suitable for high-performance computing and server equipment.

 

2. Comparison of power consumption and heat generation between FD-SOI and FinFET in FPGA

Now, let's see how much the power consumption changes when the device is actually operated.

FinFET vs FD-SOI Power Consumption Comparison

*Logic usage rate 75%, 5G serdes x 2ch, operating frequency 125MHz, temperature 85℃

 

I would like to implement a 5Gbps high-speed serial communication circuit in FPGA and compare the power consumption under the same conditions.

 

Many manufacturers use FinFET for FPGAs suitable for high-speed communication.

The Nexus series of FPGAs released by Lattice Semiconductor since 2019 uses FD-SOI.

 

This time, I will compare the power consumption between Lattice's FPGA and other manufacturers' FPGAs.

　

Although there are differences in the device characteristics picked up, FPGAs that use FD-SOI

Power consumption can be reduced to about 1/4 of FinFET.

 

Then, how different is the calorific value at this time? I would like to do the actual calculation.

 

FinFET vs FD-SOI Thermal Value Comparison

*75% logic usage, 5G serdes x 2ch, operating frequency 125MHz

Thermal calculations are typically done as follows:

 

Junction Temperature (TJ) = Ambient Temperature (TA) + Power (W) x Thermal Resistance (ΘJA)

 

Among them, the value of "power x thermal resistance" is the value of heat dissipated from the FPGA.

 

The thermal resistance (ΘJA) varies slightly depending on the manufacturer and package type.

The difference is relatively small, so the dominant parameter will be power consumption.

 

Assuming that the thermal resistance (ΘJA) is 15°C/W, the power consumption is calculated from the graph as FinFET: 1.8W, FD-SOI: 0.4W.

 

As you can see above, compared to the FinFET process, FD-SOI generates about 20°C less heat.

Measures against soft errors ◎

　

　

FD-SOI is also highly resistant to soft errors (bit corruption in the SRAM area).

Compared to FinFET, the soft error occurrence rate can be reduced by about 1/100.

 

Therefore, even in products that require countermeasures against soft errors, FD-SOI-based FPGAs can reduce power consumption and take measures against heat generation.

 

FinFET vs FD-SOI soft error rate (FIT) comparison

*FIT (Failure In Time): 1B Device Hours

Example of FPGA using FD-SOI process

Here, we introduce an example using an FD-SOI process FPGA.

First, FD-SOI features low heat generation, which eliminates the need for heat dissipation measures such as heat sinks.

Therefore, it can be mounted on edge terminals, which are subject to restrictions such as housings and substrates.

For example, in an example using an FPGA called CertusPro-NX from Lattice

It is suitable for products such as machine vision, medical cameras, and surveillance cameras.

CertusPro-NX supports high-speed serial communication such as CXP and SLVS-EC.

In addition, FD-SOI makes it possible to construct a structure that is relatively free from heat problems.

The ability to achieve high-speed communication and low heat generation is the greatest advantage of FD-SOI-based FPGAs.

Example 1: Long-distance communication of high-speed video signals to the next stage

Example 2: High-speed transmission/I/F conversion

Below you will find detailed information about Lattice's FD-SOI based Nexus series FPGAs.

If you are having trouble with heat issues, please see below for packaging information and recommended uses.

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