Advantages of FPGAs

As the name of Field Programmable suggests, the advantage of FPGA is that it can be rewritten on the spot. There is also a negative effect that it is possible to check the operation directly on the actual machine without doing a logic simulation, which delays countermeasures when a problem occurs, but that is ultimately a problem for the person in charge. There is no big advantage.

Synergistic effect with CPU

In the case of a combination of a commercially available microcomputer and an FPGA, which is common in embedded devices, the above-mentioned merits can of course only be applied to the functions built into the FPGA. In other words, once the board is assembled, if for some reason you find yourself in a situation where you need to change the CPU, you have no choice but to start over from the beginning. However, if the platform is designed on the premise that the CPU is embedded in the FPGA, it will be possible to apply it to a wide range of applications without changing the board. If you do so, you will be able to choose whether to implement a certain process in hardware or software while considering cost performance in the design process.

Since it is a general overview, I will omit specific examples, but I think that many of you have had the experience of struggling to deal with the fact that it was found that the function/performance could not be achieved at the system debugging stage. It is meaningless for someone (company) who can keep an eye on all development targets and can design a system without waste, but if there is no expert or the system is too large to be understood by one person. In such a situation, we believe that it is necessary to have a design that prepares a "cane before falling" in some way in advance.

System design based on FPGA with CPU can be one of the means.

Automatic generation of CPUs that implement only the set of instructions to be executed

The CPU supports many instructions such as transfers, operations, and branches, but it is rare to use all of them in actual applications. In other words, you are using a CPU with redundant instruction decoding and execution logic for your application. In other words, the same thing as the disadvantages of commercially available microcomputers that I explained at the beginning of the series can be said here.

Therefore, I believe that the development flow shown in Fig. 1 is ideal from the beginning when soft-core CPUs began to appear. Analyzing applications written in high-level language, optimizing the instruction set including bit length from the instruction execution status, constructing the optimized CPU logic to execute it, and for that CPU It generates (compiles) the object code of Regarding the portion indicated by the inner wavy line, a certain manufacturer already sells a tool that generates RTL and a compiler all at once, given the design constraints of the CPU such as the instruction set and the number of pipeline stages. Furthermore, research on generating CPU architectures from high-level languages is also underway at academic societies, so the time may not be far off when CPUs optimized for each application can be used easily.

Fig. 1 CPU automatic generation flow