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The Intel® Stratix® V GX FPGA Development Kit provides a complete design environment including the hardware and software you need to jump-start your FPGA design. This development kit is RoHS compliant.
feature
With this development kit you can:
- Develop and test PCIe designs with data rates up to Gen3(*1) using PCI Express ® (PCIe ®) short card form factor compliant development boards
- Develop and test subsystems composed of DDR3 or QDR II memory
- High Speed Mezzanine Card (HSMC) connectors to interface with over 35 different HSMCs from Intel partners supporting Serial RapidIO ®, 10 Gps Ethernet, SONET, CPRI, OBSAI, and more
*1: You can purchase a daughter card, adapter, or cable (all options) compatible with the HSMC connector interface that can be used with the development kit.
Order information
| product name | Stratix V GX FPGA Development Kit |
| order code | DK-DEV-5SGXEA7N |
Contents of the development kit
The Stratix V GX FPGA Development Kit includes:
- Stratix V GX FPGA development board (see Figure 1)
- On-board device:
- Stratix V GX FPGA: 5SGXEA7K2F40C2N
- Configuration, status and setup elements
- JTAG
- Onboard USB-Blaster™ II cable
- Fast Passive Parallel (FPP) configuration via MAX ® II devices and flash memory
- 1 pushbutton for configuration reset
- 1 CPU reset push button
- 2 push buttons for configuration
- clock
- 50 MHz, 125 MHz, 100 MHz, and 148.5 MHz programmable oscillators
- SMA input (LVPECL)
- General purpose user input/output
- 10/100/1000Mbps Ethernet PHY (SGMII) with RJ-45 (copper) connector
- 16x2 character LCD
- One 8-pole dual in-line package (DIP) switch
- 16 user LEDs
- 3 user push buttons
- memory device
- DDR3 SDRAM (1,152 megabytes, 72 bits wide)
- QDR II+ SRAM (4.5 Mbytes, 2 Mbits x 18 bits wide)
- Footprint compatible with QDR II 4 Mbits x 18 bits wide
- RLDRAM II (18-bit wide bus with 72-Mbyte CIO RLDRAM)
- Components and interfaces
- PCIe x8 edge connector
- 2 HSMC connectors
- SMB for serial digital interface (SDI) input and output
- QSFP optical cage
- 10/100/1000Mbps Ethernet PHY (SGMII) with RJ-45 (copper) connector
- power supply
- laptop DC input
- PCIe edge connector
- Nios ® II Processor Web Server and Remote System Update
- HSMC card for loopback and debug
- Power adapter and cable
- Stratix V GX FPGA Development Kit Software Contents
- documents
- User guide
- Reference manual
- Board schematic and layout design files
- GUI based board test system
- Includes a complete Quartus II project with open source RTL
- Board Update Portal
- Includes a complete Quartus II project with open source RTL
- Quartus II Development Software, Development Kit Edition (DKE)
- License for full version of Quartus II software for 1 year
- documents
- On-board device:
Figure 1. Stratix V GX FPGA Development Board
Figure 2. Stratix V GX FPGA Development Board Block Diagram
Related Documents
| document | explanation |
| Stratix V GX FPGA Development Board Reference Manual (English/PDF) | Contains details about the board's components and interfaces. |
| Stratix V GX FPGA Development Kit User Guide (PDF) |
Learn how to set up the Stratix IV GX FPGA development board and use the included software. |
| Kit installation (for boards with ES silicon) |
Full documentation of all files including reference manuals, user guides, quick start guides, bill of materials, layouts, PCBs, schematics, Board Update Portal example files, Board Test System example files, etc. The installation is updated to Quartus II software version 11.1 SP2 with improved DDR3 SDRAM performance and improved transceiver design. |
| kit installation |
Full documentation of all files including reference manuals, user guides, quick start guides, bill of materials, layouts, PCBs, schematics, Board Update Portal example files, Board Test System example files, etc. install |