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The point of this content!
- Does the x1 mode supported by Intel's Quad-Serial Configuration Devices (EPCQ Devices) successfully configure FPGAs that only support EPCS Devices? verify
- Explains how to compare EPCS and EPCQ devices and how to generate programming files
1.First of all
After the power is turned on, the FPGA performs an operation called "configuration" that transfers circuit information from the external storage memory.
Intel (formerly Altera) has released serial configuration devices (hereafter referred to as EPCS devices) for some time, and the active serial (hereafter referred to as AS) mode using EPCS devices enables the simplest circuit configuration. can be configured with However, with recent FPGAs, as the device scale increases, there are cases where EPCS devices have capacity shortages and increased configuration time can cause system problems such as delays in device startup time.
We have released a new configuration device, the Quad-Serial configuration device (EPCQ device hereafter), which can address the above issues.
Features of EPCQ devices include:
- Supports x4/x1 in AS configuration
- Low cost, low pin count non-volatile memory
- Supports 2.7-3.6V operating voltage
- Can be erased or rewritten over 100,000 times
- Supports write protection function
And so on.
For more information, please see the datasheet below.
■ Quad-Serial Configuration (EPCQ) data sheet
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cfg/cfg_cf52012.pdf
One of these features is "supports AS configuration x1". FPGAs released after the EPCQ devices were released (Stratix® V devices, Arria® V devices, Cyclone® V devices, etc.) will work fine, but FPGAs released before that will not work. I'm not sure if it works with 1.
In this article, we will use a board on which an EPCS device is mounted, replace the configuration device from an EPCS device to an EPCQ device, and perform operation verification with EPCQ × 1. In addition, we will also introduce the points to note at that time.
We hope that by referring to this document, you will be able to resolve any concerns you may have about using EPCQ devices.
2. EPCQ device features
2-1. Lineup of EPCS and EPCQ devices
Up to EPCS16 8-pin SOIC is supported by EPCQ16 8-pin SOIC, and for EPCS64 and above, EPCQ devices with the same capacity are available in the same package. In addition, EPCS devices have a lineup of 32Mbit products and up to 512Mbit products that are not lined up, so there are more choices than ever before.
2-2. Pin description
Within the 16-pin SOIC symbol, EPCS devices have pins marked with (1) and EPCQ devices have pins outlined in yellow. Each pin description has the same comment "You can leave these pins floating or you can connect them to to Vcc or GND", so pin handling is fine in the same way.
The EPCS device and EPCQ device x1 have different pin names, DATA1 for DATA and DATA0 for ASDI, so be careful when connecting to FPGA.
2-3. Quartus II Development Software Support
If you want to use the EPCQ device in ×1, set the ×1 specification in the Quartus® II software settings and generate programming files.
Note that the versions supported by the Quartus II development software differ depending on the EPCQ device model, so be careful when generating programming files.
2-4. Others
For detailed information such as internal register maps and access timings for EPCS and EPCQ devices, please refer to the datasheets prepared for each device.
EPCS: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cfg/cyc_c51014.pdf
EPCQ: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cfg/cfg_cf52012.pdf
Please be sure to refer to the latest data sheet at the above URL, as the content may change as the materials are updated.
3. Configuration Verification to Cyclone III Devices
To verify the Cyclone III device, we used the Sapphire evaluation and verification board manufactured by Macnica. The external appearance will be a white board with a shape like this.
This board has an EPCS64 SOIC 16 pin mounted (blue frame in Figure 8). This time, we will replace it with the same package of EPCQ256 and perform verification. The implemented FPGA is EP3C25F324C8NES.
3-1. Replacement of configuration device
Remove the mounted EPCS64 and mount EPCQ256.
Since the EPCQ256 is new and unprogrammed, it should not be possible to configure, but just in case, I turned on the power and confirmed that configuration was not possible.
3-2. Generation of programming files
Quartus II development software v13.0SP1 was used to convert the programming files. The source SOF file was generated by the Quartus II software v7.2.
As a programming file, a file with the following specifications is generated.
- POF file / JIC file
- Compression (uncompressed/compressed) checked/unchecked
- Disable EPCS ID Check is checked/not checked
To convert SOF files to POF or JIC files, use the "Convert Programming Files" feature in the Quartus II development software. Please refer to the following for the setting location.
For information on how to use the Convert Programming Files feature, refer to Getting Started with Quartus II - Using Convert Programming Files.
3-3. Programming to EPCQ Device
The Quartus II software v13.0SP1 Programmer was used to program the EPCQ device.
The board has a JTAG header and a 10pin header that can be directly programmed to the configuration device. This time, we programmed in two ways.
- Program the POF file into the configuration device. In that case, use a 10pin header that can be directly programmed into the configuration device.
- Program the JIC file into the configuration device. Then program through the FPGA using the JTAG header.
3-4. Verification results
The following shows the result of checking the operation by programming the programming file for each specification generated in 5-2 above.
3-5. Summary
Can Cyclone III devices be configured this time with EPCQ256 AS ×1? introduced the verification of
As a result, on a board routed for the SOIC 16 pin of an EPCS device, using a programming file generated by using the Convert Programming Files function and enabling the "Disable EPCS ID check" setting, the EPCQ256 device and We were able to confirm that configuration is possible with a combination of Cyclone III devices.