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This "Getting Started with SoC" series is for users who are new to Intel® SoC FPGAs.
explanation
This document describes how to use the Preloader Support Package Generator (aka bsp-editor) provided with the Intel® SoC FPGA Embedded Design Suite (SoC EDS).
Document
"Usage of Preloader Generator ver.14" (Document for tool version: Ver 14.0 (Rev.3))
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Experience at your own seat! Intel® SoC FPGA Seminar In a Box <Free>
You can rent an evaluation board equipped with Intel® SoC FPGA for two weeks, and you can easily experience the development flow of Intel® SoC FPGA at your desk.
We also provide development tools, practice data, and manuals, so you can practice at your leisure.
Experience at your own seat! Intel® SoC FPGA Seminar In a Box <Free>