*This article is a Japanese translation by Macnica of a blog written by an engineer at DSP Concepts.

Through collaboration between DSP Concepts and Analog Devices, the performance of the Audio Weaver® Core runtime library is optimized to take full advantage of the SHARC+® cores and take advantage of the powerful SHARC+DSP FIR/IIR hardware accelerators.

This optimization effort provides clear benefits to developers of automotive audio systems and other products when using the ADSP-2156x, ADSP-2159x, and ADSP-SC59x product families of audio processors: more efficient use of the Audio Weaver built-in library often reduces CPU load, providing more processing headroom to support more complex algorithms when using Audio Weaver.

First, let's talk about tools and technology.

DSP Concepts' Audio Weaver is a low-code, hardware-agnostic audio platform that streamlines automotive audio development, reducing risk and complexity by using drag-and-drop host applications for product design in combination with audio processing engines embedded in the target SoC or DSP. With an extensive set of signal processing libraries, Audio Weaver includes tools to assist product manufacturers at each step from prototype to production.

Audio Weaver is hardware agnostic, allowing the AWE Core runtime library to be embedded into microcontroller units (MCUs), systems-on-chips (SoCs), and dedicated digital signal processors (DSPs) from a variety of silicon manufacturers.

Signal processing layouts designed in Audio Weaver can be auditioned, tuned and debugged from within the PC-based Audio Weaver Designer application before deploying the design to target hardware - no redesign is required once you are ready to deploy to a target product incorporating the AWE Core library.

Audio Weaver provides over 550 signal processing blocks, called modules, including dedicated modules containing custom automotive IP, with features such as in-car voice communication, audio upmix, engine harmonic cancellation, and road noise control. Audio Weaver can be used to design any automotive audio system, from basic designs with four speakers, to engine sound synthesis, warning systems, and full-featured automotive systems with 30+ speakers.

Analog Devices' ADSP-2156x series processors are designed to deliver immersive audio in automotive and consumer/pro audio applications, featuring a SHARC+DSP core that natively supports double-precision floating-point arithmetic, an upgrade from the previous generation SHARC core. The ADSP-2159x series adds a second SHARC+DSP core, doubling performance in a pin-compatible package, providing performance scalability from 400MIPS to 2000MIPS in a single PCB design. Finally, the ADSP-SC59x series adds an Arm® Cortex®-A5 core for system connectivity support in addition to DSP performance, and offers models with one or two SHARC+DSP cores.

The FIR/IIR hardware accelerator allows more efficient use of selected audio filters and runs in parallel with the SHARC+ DSP core at the SHARC+ DSP core clock rate, providing increased processing power without additional cost. The single-core ADSP-2156x processors have one​ ​FIR and one IIR engine, while the ADSP-2159x/SC59x processors have one FIR and four​ ​IIR engines per DSP core. With the SHARC+ DSP core, built-in filter accelerators, and large on-chip SRAM, the ADSP-2156x/2159x/SC59x series SHARC+ processors are ideal for low-latency automotive audio applications such as immersive 3D sound, personal audio zones, auto active noise cancellation, road noise cancellation, engine sound synthesis, and vehicle warning systems.

DSP Concepts and Analog Devices have collaborated to optimize the performance of the AWE Core library on SHARC+ processors. In this collaboration, the two companies have addressed optimizations in multiple ways.

DSP Concepts focuses on the embedded Audio Weaver Core runtime library, which contains a collection of processing modules. Both standard and advanced DSP modules are optimized for the SHARC+ core, resulting in significant CPU load improvements.

Analog Devices has improved the AWE core library to take full advantage of the SHARC+ core's 11-stage pipeline and use optimized FIR/IIR assemblies to take advantage of FIR/IIR hardware accelerators whenever possible. Additionally, the optimized AWE core incorporates a number of hand-optimized DSP libraries, including Analog Devices' statistical functions, optimized mathematical functions, and complex real-world Fast Fourier Transform (FFT) algorithms.

As a result of this effort, the AWE Core library running on SHARC+ processor cores shows increased efficiency that can reduce overall CPU load, providing more overhead for additional features or increased channel counts. For example, comparing ADSP-21569 benchmarks before and after optimizations shows considerable improvements. Designs with FIR or Biquad filter modules instantiated with high channel counts can see an increase in processing headroom of over 13%.

Figure 1: General performance improvement of optimized libraries (Courtesy of DSP Concepts)

The actual performance gains of the Audio Weaver optimizations on the SHARC+ cores come from increased headroom for processing and the ability to offload more work to the DSP in the automotive system. These gains are illustrated in the example layout shown below, implemented on the ADSP-21569 processor. The following diagram shows the three most MIPS intensive modules in the Audio Level 1 (ALEV1) and 2 (ALEV2) examples:

Figure 2: ALEV1 performance improvement (provided by DSP Concepts)

Figure 3: ALEV2 performance improvement (provided by DSP Concepts)

When designing in-vehicle audio systems, developers will benefit greatly from the newly optimized AWE core library and SHARC+ processor cores. This combination of tools helps streamline the development process, and the joint optimization efforts by DSP Concepts and Analog Devices have shown real-world results that help product manufacturers create competitive, feature-rich designs.