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Hello, I'm Taro.
This time, I will explain the relationship between the loop bandwidth of the PLL and the spread spectrum.
See my previous column on PLL and spread spectrum.
Below is a list of pages related to this article.
● "About Buffers"
I wrote that the difference between Zero Delay Buffer and Fanout Buffer is the presence or absence of PLL.
I also wrote about the basic configuration of PLL.
● "PLL Division/Multiplication"
I wrote about the principle of division/multiplication by PLL.
The spread spectrum clock generation principle is an application of PLL division/multiplication.
● "Application of PLL (Let's reduce EMI with spread spectrum!)"
Purpose and principle of spread spectrum of clocks,
I wrote about points to note when using a spread spectrum clock.
What is the Loop Bandwidth of a PLL?
The loop bandwidth of a PLL is determined by the loop filter (LPF) component of the PLL.
Since the LPF is a low-pass filter, it outputs the low frequency band and cuts the high frequency band.
The point where the LPF cuts the high frequency band (gain is -3 dB) is called the cutoff frequency.
The frequency band up to the cutoff frequency is called the loop bandwidth.
When the loop bandwidth of the PLL is narrow
Setting a narrow loop bandwidth slows down the response of the VCO's output to PFD/CP.
The lock time of the PLL (the time it takes for REF and FB to synchronize) is increased, but momentary signal phase/frequency changes can be ignored.
In other words, Jitter can be compressed.
If you want to compress Jitter, you need to narrow the loop bandwidth.
When the loop bandwidth of the PLL is wide
A wider loop bandwidth makes the VCO's output more responsive to PFD/CP.
This results in shorter PLL lock times and faster frequency division/multiplication response.
The loop bandwidth of the PLL in the clock generator that uses the crystal output as REF must be set wide.
However, since Jitter compression of the REF signal cannot be expected, it is recommended to use a crystal oscillator with as high frequency accuracy as possible for the clock generator. Only crystals (laughs).
Loop bandwidth and spread spectrum
As explained in the previous article, spread spectrum reduces EMI by changing the output frequency.
Since it is necessary to change the frequency, the response when changing the output frequency must be fast.
In other words, the loop bandwidth must be widened when applying spread spectrum to the clock signal.
In this way, it is necessary to pay attention to the loop bandwidth when applying spread spectrum.
When distributing a spread-spectrum clock signal through a Zero Delay Buffer (ZDB), the loop bandwidth of the PLL inside the ZDB must be considered.
IDT's PCI Express-compatible buffers allow wide/narrow setting of the loop bandwidth by pin input, so it is possible to reduce output Jitter and distribute clock signals with spread spectrum.
In addition, Fanout Mode / ZDB Mode can be selected, so you can use it according to your design.
We also have other buffer products with various functions/features, so please feel free to contact us!