hello.
Since joining Altima, I have heard of standards with various names in various situations.
I would like to introduce an episode in which a big-headed leader deepened his understanding of the "I/O Standard", which is important when using Altera's FPGA, even though he had doubts about some strange parts.
When I was doing technical training, I often came up with "I/O Standard" when using Quartus® II.
It seems that the electrical characteristics differ depending on the standard, but the image is still vague and many questions arise.
First, the head of the electronics world who had just jumped into the world had doubts about their intended use before mastering the I/O Standard.
Question 1. In the first place, what is each I/O Standard used for?
In the first place, during the training, I had no idea what the purpose of the I/O Standard was.
However, when I looked into it, I found that the device handbook clearly described usage examples for the I/O Standards supported by Altera FPGAs...
So, I tried to extract the rough usage of each I/O Standard.
I've been choosing I/O Standard without thinking about anything until now, but the usage is completely different.
Question 2. How are the High / Low of various input signals recognized by the FPFA, and where is the reference value defined?
Broadly speaking, there are two types of signals: single-ended and differential voltage.
For Altera's FPGA, you can check the electrical specifications of each standard by downloading the Device Datasheet and referring to the I/O Standard Specifications in Operating Conditions. (Click “Documentation” in the upper right corner of the Altera HP screen and refer to it.)
・Single-ended: LVTTL, LVCMOS, PCI-X, etc.
If a signal is higher than a certain voltage specified in the standard, it is High, and if it is lower than that, the FPGA recognizes it as Low. The high/low of the input signal is referenced to VIH and VIL.
・Differential voltage: LVDS, BLVDS, mini-LVDS, etc.
If the potential difference between the two signals is greater than or equal to a certain value, it is recognized as High or Low. See VID in Datasheet.
Um... why is there no VID on mini-LVDS...
Wondering, scrolling down the Datasheet...
Oh, in Cyclone® IV, mini-LVDS only supports output pins!
There are various I/O Standards, but depending on the device series and I/O Standard, some support may be limited, so be sure to check the datasheet carefully!
By the way, when I read the Datasheet, it seems that there is an I/O Standard that uses a "reference voltage". It seems to define
Input the voltage referring to the VREF value in the datasheet above. I think I've seen VREF somewhere...
That's it! When I was doing practical training, I often saw it as a power supply pin when I referred to the Pin Connection Guidelines for the device series!
When I select the voltage reference type I/O Standard, I have to refer to this guideline and supply power to the listed pins exactly as stated in the datasheet! ! It's getting more and more connected! !
…When I was muttering to myself, my senior asked me another question.
Senpai: "Then, if I set the I/O Standard to 2.5 V on the Quartus® II and supply 3.3 V to VCCIO on the board, what will happen on the actual device?"
Boss: Ugh... (Uh, on the actual machine...? Pin information can be set in detail on Quartus II, so you should be able to follow it, but on the contrary, what happens if you don't follow Quartus II's instructions...? )”
The leader was in a state of confusion, but the answer was plainly written in the materials Ultima had created.
Isn't the setting on the Quartus II determining the voltage of the device on the actual machine?!
In other words, even if you set the I/O Standard to 2.5 V in Quartus II, if you supply 3.3 V to VCCIO on the actual device, the voltage of the corresponding I/O bank will be "3.3 V"!
However, only one type of VCCIO can be used within one I/O bank. It seems better to check "Pin-Out File" in "Fitter Report" in the compile report.
In this way, even such a "big-headed" newbie engineer can design "tool-friendly" thanks to the "device-friendly" Quartus II.