@W: MT246 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":240:28:240:39|Blackbox JTAGH19 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)
@W: MT246 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":119:39:119:44|Blackbox OSCA is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)
@W: MT246 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":9069:55:9069:78|Blackbox PLL is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)
@W: MT420 |Found inferred clock Lab1|jtck_inferred_clock with period 5.00ns. Please declare a user-defined clock on net jtck.
