#--  Synopsys, Inc.
#--  Version S-2021.09LR-2
#--  Project file C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\run_options.txt
#--  Written on Fri Nov 11 17:05:18 2022


#project files
add_file -constraint "Lab1_impl_1_cpe.ldc"
add_file -verilog "C:/lscc/radiant/3.2/ip/pmi/pmi_lfmxo5.v"
add_file -vhdl -lib pmi "C:/lscc/radiant/3.2/ip/pmi/pmi_lfmxo5.vhd"
add_file -verilog "C:/lscc/radiant/3.2/data/reveal/src/ertl/ertl.v"
add_file -verilog "C:/lscc/radiant/3.2/data/reveal/src/ertl/JTAG_SOFT.v"
add_file -verilog -vlog_std v2001 "C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/impl_1/reveal_workspace/tmpreveal/lab1_la0_trig_gen.v"
add_file -verilog -vlog_std v2001 "C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/impl_1/reveal_workspace/tmpreveal/lab1_la0_gen.v"
add_file -verilog -vlog_std v2001 "C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/impl_1/reveal_workspace/tmpreveal/Lab1_rvl_top.v"
add_file -constraint "C:/lscc/radiant/3.2/data/reveal/src/ertl/reveal_constraint.sdc"


#implementation: "impl_1"
impl -add impl_1 -type fpga

#
#implementation attributes

set_option -vlog_std v2001
set_option -project_relative_includes 1
set_option -include_path {C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1;C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/MULT;C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/PLL1;C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/RAM_DP1}

#device options
set_option -technology LFMXO5
set_option -part LFMXO5_25
set_option -package BBG400C
set_option -speed_grade -8
set_option -part_companion ""

#compilation/mapping options
set_option -top_module "Lab1"

# hdl_compiler_options
set_option -distributed_compile 0
set_option -hdl_strict_syntax 0

# mapper_without_write_options
set_option -frequency 200
set_option -srs_instrumentation 1

# mapper_options
set_option -write_verilog 0
set_option -write_structural_verilog 0
set_option -write_vhdl 0

# Lattice XP
set_option -maxfan 1000
set_option -disable_io_insertion 0
set_option -retiming 0
set_option -pipe 1
set_option -forcegsr auto
set_option -fix_gated_and_generated_clocks 0
set_option -rw_check_on_ram 0
set_option -update_models_cp 0
set_option -syn_edif_array_rename 0
set_option -Write_declared_clocks_only 1
set_option -seqshift_no_replicate 0

# Lattice LFMXO5
set_option -s44_optimization 0
set_option -infer_widefn 1
set_option -pack_rst_largeram 1

# NFilter
set_option -no_sequential_opt 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1
set_option -multi_file_compilation_unit 1

# Compiler Options
set_option -allow_duplicate_modules 1
set_option -auto_infer_blackbox 0

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./Lab1_impl_1.vm"

#set log file 
set_option log_file "C:/Users/12801/Downloads/Radiant_Seminar_ond/Sample/Lab1/impl_1/Lab1_impl_1.srf" 
impl -active "impl_1"
