Synthesis Report #Build: Synplify Pro (R) S-2021.09LR-2, Build 407R, Jun 27 2022 #install: C:\lscc\radiant\3.2\synpbase #OS: Windows 10 or later #Hostname: HD12801B # Fri Nov 11 17:05:18 2022 #Implementation: impl_1 Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys HDL Compiler, Version comp202109synp1, Build 403R, Built Jun 27 2022 11:09:13, @ @N|Running in 64-bit mode ###########################################################[ Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys VHDL Compiler, Version comp202109synp1, Build 403R, Built Jun 27 2022 11:09:13, @ @N|Running in 64-bit mode @N:Can't find top module! Top entity isn't set yet! @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.vhd'. VHDL syntax check successful! At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 87MB peak: 88MB) Process completed successfully. # Fri Nov 11 17:05:20 2022 ###########################################################] ###########################################################[ Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys Verilog Compiler, Version comp202109synp1, Build 403R, Built Jun 27 2022 11:09:13, @ @N|Running in 64-bit mode @I::"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v" (library work) @I::"C:\lscc\radiant\3.2\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_addsub.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_addsub.v":"C:\lscc\radiant\3.2\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":313:13:313:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":333:13:333:24|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_add.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_add.v":"C:\lscc\radiant\3.2\ip\pmi\../common/adder/rtl\lscc_adder.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v":"C:\lscc\radiant\3.2\ip\pmi\../common/complex_mult/rtl\lscc_complex_mult.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v":92:11:92:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v":101:11:101:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_counter.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_counter.v":"C:\lscc\radiant\3.2\ip\pmi\../common/counter/rtl\lscc_cntr.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/counter/rtl\lscc_cntr.v":129:13:129:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/counter/rtl\lscc_cntr.v":143:13:143:24|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_dpram.v":"C:\lscc\radiant\3.2\ip\pmi\../common/distributed_dpram/rtl\lscc_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_spram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_spram.v":"C:\lscc\radiant\3.2\ip\pmi\../common/distributed_spram/rtl\lscc_distributed_spram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_rom.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_rom.v":"C:\lscc\radiant\3.2\ip\pmi\../common/distributed_rom/rtl\lscc_distributed_rom.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v":"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":132:25:132:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":136:25:136:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":174:29:174:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":178:29:178:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":214:29:214:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":218:29:218:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v":126:11:126:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v":135:11:135:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo/rtl\lscc_fifo.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo/rtl\lscc_fifo.v":3273:17:3273:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo/rtl\lscc_fifo.v":3280:17:3280:28|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo_dc.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo_dc.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4879:25:4879:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4883:25:4883:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4914:29:4914:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4918:29:4918:40|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v":"C:\lscc\radiant\3.2\ip\pmi\../common/mult_accumulate/rtl\lscc_mult_accumulate.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v":94:11:94:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v":109:11:109:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v":"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":210:13:210:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":227:13:227:24|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v":84:11:84:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v":93:11:93:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v":"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub/rtl\lscc_mult_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v":91:11:91:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v":100:11:100:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v":"C:\lscc\radiant\3.2\ip\pmi\../common/multiplier/rtl\lscc_multiplier.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v":96:11:96:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1077:25:1077:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1081:25:1081:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1112:29:1112:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1116:29:1116:40|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_be.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_be.v":146:11:146:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_be.v":155:11:155:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_true.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_true.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1830:29:1830:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1835:29:1835:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1866:33:1866:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1870:33:1870:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1903:29:1903:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1908:29:1908:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1938:33:1938:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1942:33:1942:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2454:29:2454:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2459:29:2459:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2490:33:2490:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2494:33:2494:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2527:29:2527:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2532:29:2532:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2563:33:2563:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2567:33:2567:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3050:29:3050:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3055:29:3055:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3086:33:3086:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3090:33:3090:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3123:29:3123:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3128:29:3128:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3159:33:3159:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3163:33:3163:44|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dq/rtl\lscc_ram_dq.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dq/rtl\lscc_ram_dq.v":1465:25:1465:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dq/rtl\lscc_ram_dq.v":1471:25:1471:36|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq_be.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq_be.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq_be.v":95:11:95:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_rom.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_rom.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/rom/rtl\lscc_rom.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/rom/rtl\lscc_rom.v":955:25:955:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/rom/rtl\lscc_rom.v":961:25:961:36|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_sub.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_sub.v":"C:\lscc\radiant\3.2\ip\pmi\../common/subtractor/rtl\lscc_subtractor.v" (library work) @I::"C:\lscc\radiant\3.2\data\reveal\src\ertl\ertl.v" (library work) @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\ertl.v":242:7:242:17|Net jupdate_int is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\ertl.v":243:7:243:19|Net jupdate_early is not declared. @I::"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v" (library work) @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":70:7:70:11|Net JTDIb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":71:7:71:11|Net JCE1b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":72:7:72:11|Net JCE2b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":73:7:73:12|Net JRSTNb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":74:7:74:13|Net JSHIFTb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":75:7:75:14|Net JUPDATEb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":76:7:76:12|Net JRTI1b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":77:7:77:12|Net JRTI2b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":78:7:78:11|Net JTCKb is not declared. @W: CS141 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":802:28:802:32|Unrecognized synthesis directive state. Verify the correct directive name. @I::"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v" (library work) @I::"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v" (library work) @I::"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v" (library work) Verilog syntax check successful! At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 132MB peak: 132MB) Process completed successfully. # Fri Nov 11 17:05:22 2022 ###########################################################] ###########################################################[ @I::"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v" (library work) @I::"C:\lscc\radiant\3.2\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\radiant\3.2\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_addsub.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_addsub.v":"C:\lscc\radiant\3.2\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":313:13:313:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":333:13:333:24|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_add.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_add.v":"C:\lscc\radiant\3.2\ip\pmi\../common/adder/rtl\lscc_adder.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v":"C:\lscc\radiant\3.2\ip\pmi\../common/complex_mult/rtl\lscc_complex_mult.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v":92:11:92:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_complex_mult.v":101:11:101:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_counter.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_counter.v":"C:\lscc\radiant\3.2\ip\pmi\../common/counter/rtl\lscc_cntr.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/counter/rtl\lscc_cntr.v":129:13:129:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/counter/rtl\lscc_cntr.v":143:13:143:24|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_dpram.v":"C:\lscc\radiant\3.2\ip\pmi\../common/distributed_dpram/rtl\lscc_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_spram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_spram.v":"C:\lscc\radiant\3.2\ip\pmi\../common/distributed_spram/rtl\lscc_distributed_spram.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_rom.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_rom.v":"C:\lscc\radiant\3.2\ip\pmi\../common/distributed_rom/rtl\lscc_distributed_rom.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v":"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":132:25:132:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":136:25:136:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":174:29:174:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":178:29:178:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":214:29:214:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v":218:29:218:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v":126:11:126:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_distributed_shift_reg.v":135:11:135:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo/rtl\lscc_fifo.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo/rtl\lscc_fifo.v":3273:17:3273:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo/rtl\lscc_fifo.v":3280:17:3280:28|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo_dc.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_fifo_dc.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4879:25:4879:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4883:25:4883:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4914:29:4914:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/fifo_dc/rtl\lscc_fifo_dc.v":4918:29:4918:40|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v":"C:\lscc\radiant\3.2\ip\pmi\../common/mult_accumulate/rtl\lscc_mult_accumulate.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v":94:11:94:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mac.v":109:11:109:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v":"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":210:13:210:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":227:13:227:24|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v":84:11:84:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsubsum.v":93:11:93:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v":"C:\lscc\radiant\3.2\ip\pmi\../common/mult_add_sub/rtl\lscc_mult_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v":91:11:91:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_multaddsub.v":100:11:100:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v":"C:\lscc\radiant\3.2\ip\pmi\../common/multiplier/rtl\lscc_multiplier.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_mult.v":96:11:96:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1077:25:1077:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1081:25:1081:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1112:29:1112:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp/rtl\lscc_ram_dp.v":1116:29:1116:40|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_be.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_be.v":146:11:146:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_be.v":155:11:155:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_true.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dp_true.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1830:29:1830:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1835:29:1835:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1866:33:1866:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1870:33:1870:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1903:29:1903:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1908:29:1908:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1938:33:1938:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":1942:33:1942:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2454:29:2454:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2459:29:2459:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2490:33:2490:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2494:33:2494:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2527:29:2527:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2532:29:2532:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2563:33:2563:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":2567:33:2567:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3050:29:3050:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3055:29:3055:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3086:33:3086:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3090:33:3090:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3123:29:3123:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3128:29:3128:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3159:33:3159:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dp_true/rtl\lscc_ram_dp_true.v":3163:33:3163:44|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dq/rtl\lscc_ram_dq.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dq/rtl\lscc_ram_dq.v":1465:25:1465:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/ram_dq/rtl\lscc_ram_dq.v":1471:25:1471:36|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq_be.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq_be.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\pmi_ram_dq_be.v":95:11:95:22|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_rom.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_rom.v":"C:\lscc\radiant\3.2\ip\pmi\../avant/rom/rtl\lscc_rom.v" (library work) @N: CG334 :"C:\lscc\radiant\3.2\ip\pmi\../avant/rom/rtl\lscc_rom.v":955:25:955:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\3.2\ip\pmi\../avant/rom/rtl\lscc_rom.v":961:25:961:36|Read directive translate_on. @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_lfmxo5.v":"C:\lscc\radiant\3.2\ip\pmi\pmi_sub.v" (library work) @I:"C:\lscc\radiant\3.2\ip\pmi\pmi_sub.v":"C:\lscc\radiant\3.2\ip\pmi\../common/subtractor/rtl\lscc_subtractor.v" (library work) @I::"C:\lscc\radiant\3.2\data\reveal\src\ertl\ertl.v" (library work) @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\ertl.v":242:7:242:17|Net jupdate_int is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\ertl.v":243:7:243:19|Net jupdate_early is not declared. @I::"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v" (library work) @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":70:7:70:11|Net JTDIb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":71:7:71:11|Net JCE1b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":72:7:72:11|Net JCE2b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":73:7:73:12|Net JRSTNb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":74:7:74:13|Net JSHIFTb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":75:7:75:14|Net JUPDATEb is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":76:7:76:12|Net JRTI1b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":77:7:77:12|Net JRTI2b is not declared. @W: CG1337 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":78:7:78:11|Net JTCKb is not declared. @W: CS141 :"C:\lscc\radiant\3.2\data\reveal\src\ertl\JTAG_SOFT.v":802:28:802:32|Unrecognized synthesis directive state. Verify the correct directive name. @I::"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v" (library work) @I::"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v" (library work) @I::"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v" (library work) Verilog syntax check successful! Options changed - recompiling @N: CG364 :"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v":2118:7:2118:10|Synthesizing module OSCA in library work. Running optimization stage 1 on OSCA ....... Finished optimization stage 1 on OSCA (CPU Time 0h:00m:00s, Memory Used current: 134MB peak: 134MB) @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter CLKOS2_TRIM on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter CLKOS3_TRIM on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter CLKOS4_TRIM on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter CLKOS5_TRIM on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter DELAY_CTRL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter DIRECTION on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter DYN_SEL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter ENABLE_SYNC on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FAST_LOCK_EN on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_CUR_BLE on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_EDGE_SEL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_IF_TIMING_CTL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_MODE on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_PI_BYPASS on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_PI_RC on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_PR_CC on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FBK_PR_IC on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FLOAT_CP on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FLOCK_CTRL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FLOCK_EN on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FLOCK_SRC_SEL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter FORCE_FILTER on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter I_CTRL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter IPI_COMP_EN on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter LDT_INT_LOCK_STICKY on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter LDT_LOCK on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter LOAD_REG on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter OPENLOOP_EN on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter REF_MMD_IN on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter REF_TIMING_CTL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter REFIN_RESET on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter RESET_LF on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter ROTATE on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter SLEEP on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter STDBY_ATT on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter TRIMOS2_BYPASS_N on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter TRIMOS3_BYPASS_N on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter TRIMOS4_BYPASS_N on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter TRIMOS5_BYPASS_N on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter PHASE_SEL_DEL on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter PHASE_SEL_DEL_P1 on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @W: CG168 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9069:55:9069:78|Type of parameter EXTERNAL_DIVIDE_FACTOR on the instance \gen_no_refclk_mon.u_PLL is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type @N: CG364 :"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v":2863:7:2863:9|Synthesizing module PLL in library work. Running optimization stage 1 on PLL ....... Finished optimization stage 1 on PLL (CPU Time 0h:00m:00s, Memory Used current: 135MB peak: 136MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8533:7:8533:32|Synthesizing module PLL1_ipgen_lscc_pll_uniq_1 in library work. FVCO=88'b0011000100110100001110000011100000101110001100000011000000110000001100000011000000110000 CLKI_FREQ=72'b001100100011010000101110001100000011000000110000001100000011000000110000 CLKOP_FREQ_ACTUAL=72'b001101000011100000101110001100000011000000110000001100000011000000110000 CLKOS_FREQ_ACTUAL=80'b00110001001100000011000000101110001100000011000000110000001100000011000000110000 CLKOS2_FREQ_ACTUAL=80'b00110001001100000011000000101110001100000011000000110000001100000011000000110000 CLKOS3_FREQ_ACTUAL=80'b00110001001100000011000000101110001100000011000000110000001100000011000000110000 CLKOS4_FREQ_ACTUAL=80'b00110001001100000011000000101110001100000011000000110000001100000011000000110000 CLKOS5_FREQ_ACTUAL=80'b00110001001100000011000000101110001100000011000000110000001100000011000000110000 CLKOP_PHASE_ACTUAL=64'b0011000000101110001100000011000000110000001100000011000000110000 CLKOS_PHASE_ACTUAL=64'b0011000000101110001100000011000000110000001100000011000000110000 CLKOS2_PHASE_ACTUAL=64'b0011000000101110001100000011000000110000001100000011000000110000 CLKOS3_PHASE_ACTUAL=64'b0011000000101110001100000011000000110000001100000011000000110000 CLKOS4_PHASE_ACTUAL=64'b0011000000101110001100000011000000110000001100000011000000110000 CLKOS5_PHASE_ACTUAL=64'b0011000000101110001100000011000000110000001100000011000000110000 CLKOS_EN=32'b00000000000000000000000000000000 CLKOS2_EN=32'b00000000000000000000000000000000 CLKOS3_EN=32'b00000000000000000000000000000000 CLKOS4_EN=32'b00000000000000000000000000000000 CLKOS5_EN=32'b00000000000000000000000000000000 CLKOP_BYPASS=32'b00000000000000000000000000000000 CLKOS_BYPASS=32'b00000000000000000000000000000000 CLKOS2_BYPASS=32'b00000000000000000000000000000000 CLKOS3_BYPASS=32'b00000000000000000000000000000000 CLKOS4_BYPASS=32'b00000000000000000000000000000000 CLKOS5_BYPASS=32'b00000000000000000000000000000000 ENCLKOP_EN=32'b00000000000000000000000000000000 ENCLKOS_EN=32'b00000000000000000000000000000000 ENCLKOS2_EN=32'b00000000000000000000000000000000 ENCLKOS3_EN=32'b00000000000000000000000000000000 ENCLKOS4_EN=32'b00000000000000000000000000000000 ENCLKOS5_EN=32'b00000000000000000000000000000000 FRAC_N_EN=32'b00000000000000000000000000000000 SS_EN=32'b00000000000000000000000000000000 DYN_PORTS_EN=32'b00000000000000000000000000000000 PLL_RST=32'b00000000000000000000000000000001 LOCK_EN=32'b00000000000000000000000000000001 PLL_LOCK_STICKY=32'b00000000000000000000000000000000 LEGACY_EN=32'b00000000000000000000000000000000 LMMI_EN=32'b00000000000000000000000000000000 APB_EN=32'b00000000000000000000000000000000 POWERDOWN_EN=32'b00000000000000000000000000000000 TRIM_EN_P=32'b00000000000000000000000000000000 TRIM_EN_S=32'b00000000000000000000000000000000 PLL_REFCLK_FROM_PIN=32'b00000000000000000000000000000000 IO_TYPE=32'b01001100010101100100010001010011 CLKOP_TRIM_MODE=56'b01000110011000010110110001101100011010010110111001100111 CLKOS_TRIM_MODE=56'b01000110011000010110110001101100011010010110111001100111 CLKOP_TRIM=48'b001100000110001000110000001100000011000000110000 CLKOS_TRIM=48'b001100000110001000110000001100000011000000110000 FBK_MODE=40'b0100001101001100010010110100111101010000 CLKI_DIVIDER_ACTUAL_STR=8'b00110001 FBCLK_DIVIDER_ACTUAL_STR=8'b00110010 DIVOP_ACTUAL_STR=16'b0011001100110000 DIVOS_ACTUAL_STR=8'b00110111 DIVOS2_ACTUAL_STR=8'b00110111 DIVOS3_ACTUAL_STR=8'b00110111 DIVOS4_ACTUAL_STR=8'b00110111 DIVOS5_ACTUAL_STR=8'b00110111 SSC_N_CODE_STR=88'b0011000001100010001100000011000000110000001100000011000000110000001100000011000100110000 SSC_F_CODE_STR=136'b0011000001100010001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 SSC_PROFILE=32'b01000100010011110101011101001110 SSC_TBASE_STR=112'b0011000001100010001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 SSC_STEP_IN_STR=72'b001100000110001000110000001100000011000000110000001100000011000000110000 SSC_REG_WEIGHTING_SEL_STR=40'b0011000001100010001100000011000000110000 DELA=16'b0011001100110000 DELB=8'b00110111 DELC=8'b00110111 DELD=8'b00110111 DELE=8'b00110111 DELF=8'b00110111 PHIA=8'b00110000 PHIB=8'b00110000 PHIC=8'b00110000 PHID=8'b00110000 PHIE=8'b00110000 PHIF=8'b00110000 EN_REFCLK_MON=32'b00000000000000000000000000000000 REF_COUNTS=32'b00110000001100000011000000110000 INTFBKDEL_SEL=64'b0100010001001001010100110100000101000010010011000100010101000100 PMU_WAITFORLOCK=56'b01000101010011100100000101000010010011000100010101000100 REF_OSC_CTRL=24'b001100110101000000110010 SIM_FLOAT_PRECISION=24'b001100000010111000110001 IPI_CMP=48'b001100000110001000110001001100000011000000110001 CSET=16'b0011100001010000 CRIPPLE=16'b0011011101010000 IPP_CTRL=48'b001100000110001000110000001100010011000100110000 IPP_SEL=48'b001100000110001000110000001100010011000100110001 BW_CTL_BIAS=48'b001100000110001000110001001100010011000100110001 V2I_PP_RES=40'b0011000100110000010100000011011101001011 KP_VCO=56'b00110000011000100011000000110000001100000011000100110001 V2I_KVCO_SEL=16'b0011011000110000 V2I_1V_EN=56'b01000101010011100100000101000010010011000100010101000100 MAX_STRING_LENGTH=32'b00000000000000000000000000010000 CONVWIDTH=32'b00000000000000000000000000100000 SEL_FBK=56'b01000110010000100100101101000011010011000100101100110000 CLKMUX_FB=88'b0000000001000011010011010101010101011000010111110100001101001100010010110100111101010000 SEL_OUTA=64'b0100010001001001010100110100000101000010010011000100010101000100 SEL_OUTB=64'b0100010001001001010100110100000101000010010011000100010101000100 SEL_OUTC=64'b0100010001001001010100110100000101000010010011000100010101000100 SEL_OUTD=64'b0100010001001001010100110100000101000010010011000100010101000100 SEL_OUTE=64'b0100010001001001010100110100000101000010010011000100010101000100 SEL_OUTF=64'b0100010001001001010100110100000101000010010011000100010101000100 REF_INTEGER_MODE=56'b01000101010011100100000101000010010011000100010101000100 FBK_INTEGER_MODE=64'b0000000001000101010011100100000101000010010011000100010101000100 SSC_EN_SSC=64'b0100010001001001010100110100000101000010010011000100010101000100 SSC_EN_SDM=64'b0100010001001001010100110100000101000010010011000100010101000100 SSC_ORDER=80'b01010011010001000100110101011111010011110101001001000100010001010101001000110001 SSC_DITHER=64'b0100010001001001010100110100000101000010010011000100010101000100 SSC_N_CODE=88'b0011000001100010001100000011000000110000001100000011000000110000001100000011000000110000 SSC_F_CODE=136'b0011000001100010001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 SSC_PI_BYPASS=96'b010011100100111101010100010111110100001001011001010100000100000101010011010100110100010101000100 SSC_SQUARE_MODE=64'b0100010001001001010100110100000101000010010011000100010101000100 SSC_EN_CENTER_IN=120'b000000000000000001000100010011110101011101001110010111110101010001010010010010010100000101001110010001110100110001000101 SSC_TBASE=112'b0011000001100010001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 SSC_STEP_IN=72'b001100000110001000110000001100000011000000110000001100000011000000110000 SSC_REG_WEIGHTING_SEL=40'b0011000001100010001100000011000000110000 ENCLK_CLKOP=64'b0000000001000101010011100100000101000010010011000100010101000100 ENCLK_CLKOS=64'b0100010001001001010100110100000101000010010011000100010101000100 ENCLK_CLKOS2=64'b0100010001001001010100110100000101000010010011000100010101000100 ENCLK_CLKOS3=64'b0100010001001001010100110100000101000010010011000100010101000100 ENCLK_CLKOS4=64'b0100010001001001010100110100000101000010010011000100010101000100 ENCLK_CLKOS5=64'b0100010001001001010100110100000101000010010011000100010101000100 DYN_SOURCE=56'b00000000010100110101010001000001010101000100100101000011 PLLRESET_ENA=64'b0000000001000101010011100100000101000010010011000100010101000100 PLLPDN_EN=64'b0100010001001001010100110100000101000010010011000100010101000100 PLLPD_N=32'b01010101010100110100010101000100 LEGACY_ATT=64'b0100010001001001010100110100000101000010010011000100010101000100 LDT_LOCK_SEL=40'b0101010101000110010100100100010101010001 TRIMOP_BYPASS_N=64'b0100001001011001010100000100000101010011010100110100010101000100 TRIMOS_BYPASS_N=64'b0100001001011001010100000100000101010011010100110100010101000100 FBK_MMD_DIG=8'b00110010 REF_MMD_DIG=8'b00110001 REF_MASK=80'b00110000011000100011000000110000001100000011000000110000001100000011000000110000 FBK_MASK=80'b00110000011000100011000000110000001100000011000000110000001100000011000000110000 FBK_MMD_PULS_CTL=48'b001100000110001000110000001100000011000000110000 REF_MMD_PULS_CTL=48'b001100000110001000110000001100000011000000110000 DIVA=16'b0011001100110000 DIVB=8'b00110111 DIVC=8'b00110111 DIVD=8'b00110111 DIVE=8'b00110111 DIVF=8'b00110111 V2I_PP_ICTRL=56'b00110000011000100011000100110001001100010011000100110001 IPI_CMPN=48'b001100000110001000110000001100000011000100110001 FBK_CLK_DIV_O=32'b00000000000000000000000000011110 DIV_DEL=72'b001100000110001000110000001100000011000100110001001100010011000100110000 Generated name = PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0 @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8574:16:8574:24|Removing wire refdetlos, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8593:16:8593:27|Removing wire apb_pready_o, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8594:16:8594:28|Removing wire apb_pslverr_o, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8595:22:8595:33|Removing wire apb_prdata_o, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8850:9:8850:26|Removing wire apb_lmmi_request_w, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8851:15:8851:31|Removing wire apb_lmmi_offset_w, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8852:15:8852:30|Removing wire apb_lmmi_wdata_w, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8853:15:8853:30|Removing wire apb_lmmi_rdata_w, as there is no assignment to it. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8854:9:8854:25|Removing wire apb_lmmi_wr_rdn_w, as there is no assignment to it. Running optimization stage 1 on PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0 ....... @W: CL318 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8574:16:8574:24|*Output refdetlos has undriven bits; assigning undriven bits to 'Z'. Simulation mismatch possible. Assign all bits of the output. @W: CL318 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8593:16:8593:27|*Output apb_pready_o has undriven bits; assigning undriven bits to 'Z'. Simulation mismatch possible. Assign all bits of the output. @W: CL318 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8594:16:8594:28|*Output apb_pslverr_o has undriven bits; assigning undriven bits to 'Z'. Simulation mismatch possible. Assign all bits of the output. @W: CL318 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8595:22:8595:33|*Output apb_prdata_o has undriven bits; assigning undriven bits to 'Z'. Simulation mismatch possible. Assign all bits of the output. Finished optimization stage 1 on PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0 (CPU Time 0h:00m:00s, Memory Used current: 135MB peak: 136MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8386:7:8386:17|Synthesizing module PLL1_uniq_1 in library work. Running optimization stage 1 on PLL1_uniq_1 ....... Finished optimization stage 1 on PLL1_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 135MB peak: 136MB) @N: CG364 :"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v":2155:7:2155:12|Synthesizing module PDP16K in library work. Running optimization stage 1 on PDP16K ....... Finished optimization stage 1 on PDP16K (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 136MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":11448:7:11448:43|Synthesizing module RAM_DP1_ipgen_lscc_ram_dp_core_uniq_1 in library work. _FCODE_LIFCL_=32'b00000000000000000000000000000001 _FCODE_ICE_=32'b00000000000000000000000000000010 _FCODE_AP6_=32'b00000000000000000000000000000011 _FCODE_COMMON_=32'b00000000000000000000000000000000 MEM_ID=56'b01010010010000010100110101011111010001000101000000110001 MEM_SIZE=48'b001100010011100000101100001100010011001000111000 FAMILY=40'b0100110001001001010001100100001101001100 FAMILY_CODE=32'b00000000000000000000000000000001 DATA_WIDTH_W=32'b00000000000000000000000000010010 ADDR_WIDTH_W=32'b00000000000000000000000000001010 DATA_WIDTH_R=32'b00000000000000000000000000010010 ADDR_WIDTH_R=32'b00000000000000000000000000001010 REGMODE=24'b011100100110010101100111 GSR=56'b01100101011011100110000101100010011011000110010101100100 RESETMODE=32'b01110011011110010110111001100011 RESET_RELEASE=32'b01110011011110010110111001100011 INIT_FILE=32'b01101110011011110110111001100101 INIT_FILE_FORMAT=48'b011000100110100101101110011000010111001001111001 INIT_MODE=64'b0110110101100101011011010101111101100110011010010110110001100101 BYTE_ENABLE=1'b0 BYTE_WIDTH=32'b00000000000000000000000000000001 ECC_ENABLE=32'b00000000000000000000000000000000 CSDECODE_W=32'b00000000000000000000000000000000 CSDECODE_R=32'b00000000000000000000000000000000 OPTIMIZATION=40'b0111001101110000011001010110010101100100 OUTPUT_CLK_EN=32'b00000000000000000000000000000000 BYTE_ENABLE_POL=88'b0110000101100011011101000110100101110110011001010010110101101000011010010110011101101000 POSx=32'b00000000000000000000000000000000 POSy=32'b00000000000000000000000000000000 STRING_SIZE=32'b00000000000000000000000000101000 INIT_VALUE_00=656'b00110000011110000011000000110000001100000011000000111000001100000011000000110000001100000011100000110000001100000011000000110000001110000011000000110000001100000011000000111000001100000011000000110000001100000011100000110000001100000011000000110000001110000011000000110000001100000011000000111000001100110100011001000100010001100011100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011011101000110010001000100011001000110 INIT_VALUE_01=656'b00110000011110000011000000110000001110000011000000110000001100000011000000111000001100000011100000110000001100110100010001000110001100000011000000110000001110000011000000110000001100000011000000111000001100000011000000110000001100000011100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110001001110000011000000110000001101010100011000110000001100000011000000111000001100000011100000110000001100000011100000110000001110000011000000110000001110000011000000111000001100000011000000110101010001100011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_02=656'b00110000011110000011000000110000001110000011000000111000001100000011000000110101010001100011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011001100110101010001100011100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011100000110000001100000011000000110000001110000011000000111000001100000011001101000100010001100011000000110000001100000011100000110000001100000011000000110000001110000011000000110000001100000011000000111000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_03=656'b00110000011110000011011000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001101010011100100110000001100000011000000111000001110000011100000110000001100000011100000111000001110000011000000110000001110000011100000111000001100000011000000110101010001100011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110100001100010011000000110000001100000011100000110000001110000011000000110000001110000011000000111000 INIT_VALUE_04=656'b00110000011110000011000000110000001100000011011100110000001100000011000000110000010001100100001100110000001100000011000000110111010000010011000000110000001100000011001101000010001100000011000000110000001100110011001000110000001100000011000101000100001100110011000000110000001101000011000000110010001100000011000000110100001110000100001100110000001100000011010000110001001110000011000000110000001100010100010100110000001100000011000000110000001110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110011 INIT_VALUE_05=656'b00110000011110000011000101000110010001000100001100110000001100010100011001000100010001010011000000110000010001100100010001000110001100000011000000110111010001000100011000110000001100000011011101000100010001100011000000110000001100110100010001000011001110000011000000110011010001000100001101000110001100000011000001000100010000110011100100110010001100010100010000110000001110010011001101000110001101010011000000111000001100110011000000110001001100000011100000110001001100000011000100110001001110000011000100110100001100010011011100111000001100010011000000110001010000110100001100110000010001100100010000110000001100000011000000110100001100000011000000110000 INIT_VALUE_06=656'b00110000011110000011000000110101001110000100011001000011001100000011001100111000001110010100001100110000001100110100010000110110010000110011000000110011010001000011011001000011001100000011001101000100001101100100001100110000001100110100010000110110010000110011000000110011001110000011100101000011001100000011001100111000010001100100001100110000001101010100010001000101010000110011000001000001010001000100010100110100001100000100001000110101010000110011000000110000001101000011000000110000001100000011000000110000001100000011000000110000001100000011001100111000010001100011000000110000001100110011000101000011001100000011000001000110001101010011100000110000 INIT_VALUE_07=656'b00110000011110000011011101000110010001000100011001000110001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011010000110000001100000011000000110000010000010011010101000011001101000011000001000100010001000100010101000011 INIT_VALUE_08=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_09=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_0A=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_0B=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_0C=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_0D=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_0E=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_0F=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_10=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_11=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_12=656'b00110000011110000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 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\LIFCL_MEM.OUTREG =64'b0000000000000000000000000000000001010101010100110100010101000100 \LIFCL_MEM.TRUE_CSW =24'b001100000011000000110000 \LIFCL_MEM.TRUE_CSR =24'b001100000011000000110000 \LIFCL_MEM.DW_W =24'b010110000011000100111000 \LIFCL_MEM.DW_R =24'b010110000011000100111000 \LIFCL_MEM.TRUE_RST =40'b0000000001010011010110010100111001000011 \LIFCL_MEM.TRUE_RST_REL =40'b0000000001010011010110010100111001000011 \LIFCL_MEM.TRUE_ECC =64'b0100010001001001010100110100000101000010010011000100010101000100 \LIFCL_MEM.TRUE_GSR =64'b0000000001000101010011100100000101000010010011000100010101000100 \LIFCL_MEM.MEM_TYPE =24'b010001010100001001010010 \LIFCL_MEM.T_MEM_SIZE =64'b0101101100110001001110000010110000110001001100100011100001011101 Generated name = RAM_DP1_ipgen_lscc_ram_dp_core_uniq_1_Z2_layer0 Running optimization stage 1 on RAM_DP1_ipgen_lscc_ram_dp_core_uniq_1_Z2_layer0 ....... Finished optimization stage 1 on RAM_DP1_ipgen_lscc_ram_dp_core_uniq_1_Z2_layer0 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 136MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9834:7:9834:43|Synthesizing module RAM_DP1_ipgen_lscc_ram_dp_main_uniq_1 in library work. _FCODE_LIFCL_=32'b00000000000000000000000000000001 _FCODE_ICE_=32'b00000000000000000000000000000010 _FCODE_AP6_=32'b00000000000000000000000000000011 _FCODE_COMMON_=32'b00000000000000000000000000000000 MEM_ID=56'b01010010010000010100110101011111010001000101000000110001 MEM_SIZE=48'b001100010011100000101100001100010011001000111000 FAMILY=40'b0100110001001001010001100100001101001100 FAMILY_CODE=32'b00000000000000000000000000000001 WADDR_DEPTH=32'b00000000000000000000000010000000 WADDR_WIDTH=32'b00000000000000000000000000000111 WDATA_WIDTH=32'b00000000000000000000000000010010 RADDR_DEPTH=32'b00000000000000000000000010000000 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=32'b00000000000000000000000000000001 \NON_MIX.EBR_ADDR =32'b00000000000000000000000000000001 \NON_MIX.BYTE_WIDTH_IMPL =32'b00000000000000000000000000000001 \NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[0].ECO_POSX =32'b00000000000000000000000000000000 \NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[0].ECO_POSY =32'b00000000000000000000000000000000 Generated name = RAM_DP1_ipgen_lscc_ram_dp_main_uniq_1_Z3_layer0 Running optimization stage 1 on RAM_DP1_ipgen_lscc_ram_dp_main_uniq_1_Z3_layer0 ....... Finished optimization stage 1 on RAM_DP1_ipgen_lscc_ram_dp_main_uniq_1_Z3_layer0 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9570:7:9570:38|Synthesizing module RAM_DP1_ipgen_lscc_ram_dp_uniq_1 in library work. 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INIT_VALUE_58=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 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INIT_VALUE_5B=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_5C=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 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INIT_VALUE_60=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 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INIT_VALUE_63=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_64=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_65=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_66=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_67=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_68=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_69=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_6A=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_6B=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_6C=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_6D=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_6E=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_6F=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_70=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_71=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_72=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_73=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_74=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_75=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_76=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_77=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_78=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_79=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_7A=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_7B=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_7C=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_7D=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_7E=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 INIT_VALUE_7F=528'b001100000111100000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000 T_FAMILY=48'b000000000100110001001001010001100100001101001100 Generated name = RAM_DP1_ipgen_lscc_ram_dp_uniq_1_Z4_layer0 Running optimization stage 1 on RAM_DP1_ipgen_lscc_ram_dp_uniq_1_Z4_layer0 ....... Finished optimization stage 1 on RAM_DP1_ipgen_lscc_ram_dp_uniq_1_Z4_layer0 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9338:7:9338:20|Synthesizing module RAM_DP1_uniq_1 in library work. Running optimization stage 1 on RAM_DP1_uniq_1 ....... Finished optimization stage 1 on RAM_DP1_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":11202:7:11202:43|Synthesizing module MULT_ipgen_lscc_multiplier_dsp_uniq_1 in library work. USE_COEFF=32'b00000000000000000000000000000000 COEFF=32'b00000000000000000000000000000010 A_WIDTH=32'b00000000000000000000000000000011 B_WIDTH=32'b00000000000000000000000000000011 A_SIGNED=16'b0110111101101110 B_SIGNED=16'b0110111101101110 USE_IREG=16'b0110111101101110 USE_OREG=16'b0110111101101110 PIPELINES=32'b00000000000000000000000000000001 A_SIGN=1'b1 B_SIGN=1'b1 C_SIGN=1'b0 COEFF_EN=1'b0 COEFF_ABS=32'b00000000000000000000000000000010 C_WDT=32'b00000000000000000000000000000010 X_WDT=32'b00000000000000000000000000000011 M_WDT=32'b00000000000000000000000000000110 A_WDT_GT_X_WDT=1'b0 MAX_WDT=32'b00000000000000000000000000000011 PIPES=32'b00000000000000000000000000000001 SFT_WDT=32'b00000000000000000000000000000011 C_VAL=2'b10 A_VAL_0=3'b000 B_VAL_0=3'b000 M_VAL_0=6'b000000 Generated name = MULT_ipgen_lscc_multiplier_dsp_uniq_1_Z5_layer0 Running optimization stage 1 on MULT_ipgen_lscc_multiplier_dsp_uniq_1_Z5_layer0 ....... Finished optimization stage 1 on MULT_ipgen_lscc_multiplier_dsp_uniq_1_Z5_layer0 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":11142:7:11142:39|Synthesizing module MULT_ipgen_lscc_multiplier_uniq_1 in library work. USE_COEFF=32'b00000000000000000000000000000000 COEFF=32'b00000000000000000000000000000010 A_WIDTH=32'b00000000000000000000000000000011 B_WIDTH=32'b00000000000000000000000000000011 A_SIGNED=16'b0110111101101110 B_SIGNED=16'b0110111101101110 USE_IREG=16'b0110111101101110 USE_OREG=16'b0110111101101110 PIPELINES=32'b00000000000000000000000000000001 IMPL=24'b010001000101001101010000 FAMILY=48'b010011000100011001001101010110000100111100110101 C_SIGN=1'b0 COEFF_EN=1'b0 COEFF_ABS=32'b00000000000000000000000000000010 C_WDT=32'b00000000000000000000000000000010 X_WDT=32'b00000000000000000000000000000011 M_WDT=32'b00000000000000000000000000000110 Generated name = MULT_ipgen_lscc_multiplier_uniq_1_Z6_layer0 Running optimization stage 1 on MULT_ipgen_lscc_multiplier_uniq_1_Z6_layer0 ....... Finished optimization stage 1 on MULT_ipgen_lscc_multiplier_uniq_1_Z6_layer0 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":11057:7:11057:17|Synthesizing module MULT_uniq_1 in library work. Running optimization stage 1 on MULT_uniq_1 ....... Finished optimization stage 1 on MULT_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) @N: CG364 :"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v":6974:7:6974:9|Synthesizing module VHI in library work. Running optimization stage 1 on VHI ....... Finished optimization stage 1 on VHI (CPU Time 0h:00m:00s, Memory Used current: 136MB peak: 137MB) Running optimization stage 1 on rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s ....... Finished optimization stage 1 on rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s (CPU Time 0h:00m:00s, Memory Used current: 138MB peak: 139MB) Running optimization stage 1 on rvl_decode_1s_1s ....... Finished optimization stage 1 on rvl_decode_1s_1s (CPU Time 0h:00m:00s, Memory Used current: 138MB peak: 139MB) Running optimization stage 1 on rvl_tu_7s_0s_0s_0s_1s ....... Finished optimization stage 1 on rvl_tu_7s_0s_0s_0s_1s (CPU Time 0h:00m:00s, Memory Used current: 139MB peak: 139MB) Running optimization stage 1 on pmi_rtl_ram_dp_2s_1s_2s_reg_none_binary_LFMXO5 ....... Finished optimization stage 1 on pmi_rtl_ram_dp_2s_1s_2s_reg_none_binary_LFMXO5 (CPU Time 0h:00m:00s, Memory Used current: 139MB peak: 139MB) Running optimization stage 1 on rvl_te_Z7_layer0 ....... Finished optimization stage 1 on rvl_te_Z7_layer0 (CPU Time 0h:00m:00s, Memory Used current: 139MB peak: 140MB) Running optimization stage 1 on rvl_tcnt_1s_3s_1_0s ....... Finished optimization stage 1 on rvl_tcnt_1s_3s_1_0s (CPU Time 0h:00m:00s, Memory Used current: 139MB peak: 140MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":11:7:11:19|Synthesizing module lab1_la0_trig in library work. Running optimization stage 1 on lab1_la0_trig ....... Finished optimization stage 1 on lab1_la0_trig (CPU Time 0h:00m:00s, Memory Used current: 139MB peak: 140MB) Running optimization stage 1 on pmi_rtl_ram_dp_512s_9s_37s_reg_none_binary_LFMXO5 ....... Finished optimization stage 1 on pmi_rtl_ram_dp_512s_9s_37s_reg_none_binary_LFMXO5 (CPU Time 0h:00m:00s, Memory Used current: 140MB peak: 141MB) Running optimization stage 1 on rvl_tm_Z8_layer0 ....... Finished optimization stage 1 on rvl_tm_Z8_layer0 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":12:7:12:14|Synthesizing module lab1_la0 in library work. Running optimization stage 1 on lab1_la0 ....... Finished optimization stage 1 on lab1_la0 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":2:7:2:20|Synthesizing module reveal_coretop in library work. @W: CG360 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":18:29:18:39|Removing wire trigger_out, as there is no assignment to it. Running optimization stage 1 on reveal_coretop ....... Finished optimization stage 1 on reveal_coretop (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) @N: CG364 :"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v":7051:7:7051:13|Synthesizing module JTAGH19 in library work. Running optimization stage 1 on JTAGH19 ....... Finished optimization stage 1 on JTAGH19 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) @N: CG364 :"C:\lscc\radiant\3.2\synpbase\lib\lucent\lfmxo5.v":6989:7:6989:9|Synthesizing module VLO in library work. Running optimization stage 1 on VLO ....... Finished optimization stage 1 on VLO (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) @N: CG364 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":84:7:84:10|Synthesizing module Lab1 in library work. Running optimization stage 1 on Lab1 ....... Finished optimization stage 1 on Lab1 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on Lab1 ....... @W: CL247 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":85:16:85:17|Input port bit 3 of SW[3:0] is unused Finished optimization stage 2 on Lab1 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on VLO ....... Finished optimization stage 2 on VLO (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on JTAGH19 ....... Finished optimization stage 2 on JTAGH19 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on reveal_coretop ....... Finished optimization stage 2 on reveal_coretop (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on lab1_la0 ....... @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":51:7:51:13|Input reset_n is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":62:7:62:16|Input trigger_en is unused. Finished optimization stage 2 on lab1_la0 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on pmi_rtl_ram_dp_512s_9s_37s_reg_none_binary_LFMXO5 ....... Finished optimization stage 2 on pmi_rtl_ram_dp_512s_9s_37s_reg_none_binary_LFMXO5 (CPU Time 0h:00m:00s, Memory Used current: 141MB peak: 142MB) Running optimization stage 2 on rvl_tm_Z8_layer0 ....... Finished optimization stage 2 on rvl_tm_Z8_layer0 (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 147MB) Running optimization stage 2 on lab1_la0_trig ....... Finished optimization stage 2 on lab1_la0_trig (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 147MB) Running optimization stage 2 on rvl_tcnt_1s_3s_1_0s ....... Finished optimization stage 2 on rvl_tcnt_1s_3s_1_0s (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 147MB) Running optimization stage 2 on pmi_rtl_ram_dp_2s_1s_2s_reg_none_binary_LFMXO5 ....... Finished optimization stage 2 on pmi_rtl_ram_dp_2s_1s_2s_reg_none_binary_LFMXO5 (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 147MB) Running optimization stage 2 on rvl_te_Z7_layer0 ....... Extracted state machine for register next_then_shift State machine has 3 reachable states with original encodings of: 00 01 10 Finished optimization stage 2 on rvl_te_Z7_layer0 (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 153MB) Running optimization stage 2 on rvl_tu_7s_0s_0s_0s_1s ....... Finished optimization stage 2 on rvl_tu_7s_0s_0s_0s_1s (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 153MB) Running optimization stage 2 on rvl_decode_1s_1s ....... Finished optimization stage 2 on rvl_decode_1s_1s (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 153MB) Running optimization stage 2 on rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s ....... Finished optimization stage 2 on rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on VHI ....... Finished optimization stage 2 on VHI (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on MULT_uniq_1 ....... Finished optimization stage 2 on MULT_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on MULT_ipgen_lscc_multiplier_uniq_1_Z6_layer0 ....... Finished optimization stage 2 on MULT_ipgen_lscc_multiplier_uniq_1_Z6_layer0 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on MULT_ipgen_lscc_multiplier_dsp_uniq_1_Z5_layer0 ....... Finished optimization stage 2 on MULT_ipgen_lscc_multiplier_dsp_uniq_1_Z5_layer0 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on RAM_DP1_uniq_1 ....... Finished optimization stage 2 on RAM_DP1_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on RAM_DP1_ipgen_lscc_ram_dp_uniq_1_Z4_layer0 ....... Finished optimization stage 2 on RAM_DP1_ipgen_lscc_ram_dp_uniq_1_Z4_layer0 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on RAM_DP1_ipgen_lscc_ram_dp_main_uniq_1_Z3_layer0 ....... @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":9859:31:9859:35|Input ben_i is unused. Finished optimization stage 2 on RAM_DP1_ipgen_lscc_ram_dp_main_uniq_1_Z3_layer0 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on RAM_DP1_ipgen_lscc_ram_dp_core_uniq_1_Z2_layer0 ....... @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":11468:10:11468:24|Input rd_out_clk_en_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":11474:31:11474:35|Input ben_i is unused. Finished optimization stage 2 on RAM_DP1_ipgen_lscc_ram_dp_core_uniq_1_Z2_layer0 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on PDP16K ....... Finished optimization stage 2 on PDP16K (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on PLL1_uniq_1 ....... Finished optimization stage 2 on PLL1_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0 ....... @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8549:10:8549:20|Input usr_fbclk_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8573:10:8573:20|Input refdetreset is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8586:10:8586:19|Input apb_pclk_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8587:10:8587:23|Input apb_preset_n_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8588:15:8588:27|Input apb_penable_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8589:15:8589:24|Input apb_psel_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8590:15:8590:26|Input apb_pwrite_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8591:21:8591:31|Input apb_paddr_i is unused. @N: CL159 :"C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\reveal_workspace\tmpreveal\Lab1_rvl_top.v":8592:21:8592:32|Input apb_pwdata_i is unused. Finished optimization stage 2 on PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on PLL ....... Finished optimization stage 2 on PLL (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) Running optimization stage 2 on OSCA ....... Finished optimization stage 2 on OSCA (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 153MB) For a summary of runtime and memory usage per design unit, please see file: ========================================================== @L: C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\synwork\layer0.rt.csv At c_ver Exit (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 149MB peak: 153MB) Process completed successfully. # Fri Nov 11 17:05:30 2022 ###########################################################] ###########################################################[ Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys Synopsys Netlist Linker, Version comp202109synp1, Build 403R, Built Jun 27 2022 11:09:13, @ @N|Running in 64-bit mode At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 94MB peak: 94MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Fri Nov 11 17:05:32 2022 ###########################################################] For a summary of runtime and memory usage for all design units, please see file: ========================================================== @L: C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\synwork\Lab1_impl_1_comp.rt.csv @END At c_hdl Exit (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:10s; Memory used current: 24MB peak: 25MB) Process took 0h:00m:13s realtime, 0h:00m:10s cputime Process completed successfully. # Fri Nov 11 17:05:32 2022 ###########################################################] ###########################################################[ Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys Synopsys Netlist Linker, Version comp202109synp1, Build 403R, Built Jun 27 2022 11:09:13, @ @N|Running in 64-bit mode File C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\synwork\Lab1_impl_1_comp.srs changed - recompiling At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 95MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Fri Nov 11 17:05:34 2022 ###########################################################] Premap Report # Fri Nov 11 17:05:38 2022 Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys Lattice Technology Pre-mapping, Version map202109lat, Build 180R, Built Jun 27 2022 09:38:19, @ Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 118MB peak: 118MB) Done reading skeleton netlist (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 123MB peak: 130MB) Reading constraint file: C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\Lab1_impl_1_cpe.ldc Reading constraint file: C:\lscc\radiant\3.2\data\reveal\src\ertl\reveal_constraint.sdc @L: C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\Lab1_impl_1_scck.rpt See clock summary report "C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\Lab1_impl_1_scck.rpt" @N: MF916 |Option synthesis_strategy=base is enabled. @N: MF248 |Running in 64-bit mode. @N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 131MB peak: 131MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 131MB peak: 131MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 143MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 145MB) @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. Starting HSTDM IP insertion (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 176MB peak: 176MB) Finished HSTDM IP insertion (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 176MB peak: 176MB) @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_1 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_1 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_2 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_2 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_3 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_3 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_4 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_4 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_5 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_5 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_6 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_6 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_7 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_7 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_8 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_8 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8593:16:8593:27|Tristate driver apb_pready_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_pready_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8594:16:8594:28|Tristate driver apb_pslverr_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_pslverr_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":95:0:95:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_gen.v":172:0:172:3|Instance tm_u of partition view:work.rvl_tm_Z8_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":96:0:96:7|Instance decode_u of partition view:work.rvl_decode_1s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":110:0:110:3|Instance tu_0 of partition view:work.rvl_tu_7s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":130:0:130:3|Instance te_0 of partition view:work.rvl_te_Z7_layer0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_la0_trig_gen.v":162:0:162:5|Instance tcnt_0 of partition view:work.rvl_tcnt_1s_3s_1_0s(verilog) has no references to its outputs; instance not removed. Encoding state machine next_then_shift[2:0] (in view: work.rvl_te_Z7_layer0(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Starting clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 178MB peak: 178MB) mixed edge conversion for GCC is OFF mixed edge conversion for GCC is OFF Finished clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 179MB peak: 179MB) @N: FX1184 |Applying syn_allowed_resources blockrams=80 on top level netlist Lab1 Finished netlist restructuring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 179MB peak: 179MB) Clock Summary ****************** Start Requested Requested Clock Clock Clock Level Clock Frequency Period Type Group Load --------------------------------------------------------------------------------------------------------------- 0 - clk48m 48.0 MHz 20.833 declared default_clkgroup 309 0 - System 200.0 MHz 5.000 system system_clkgroup 0 0 - rvltck 30.0 MHz 33.330 declared default_clkgroup 0 0 - Lab1|jtck_inferred_clock 200.0 MHz 5.000 inferred Inferred_clkgroup_0_1 306 =============================================================================================================== Clock Load Summary *********************** Clock Source Clock Pin Non-clock Pin Non-clock Pin Clock Load Pin Seq Example Seq Example Comb Example ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- clk48m 309 i_PLL1.lscc_pll_inst.\\gen_no_refclk_mon\.u_PLL.CLKOP(PLL) freq_cont[9:0].C - - System 0 - - - - rvltck 0 TCK(port) - - - Lab1|jtck_inferred_clock 306 jtaghub_inst.JTCK(JTAGH19) Lab1_reveal_coretop_instance.lab1_la0_inst_0.tm_u.tm_first_rd_d1.C - Lab1_reveal_coretop_instance.lab1_la0_inst_0.tm_u.genblk4\.un1_jtck.I[0](inv) ============================================================================================================================================================================================================================================================================ ICG Latch Removal Summary: Number of ICG latches removed: 0 Number of ICG latches not removed: 0 For details review file gcc_ICG_report.rpt @S |Clock Optimization Summary #### START OF PREMAP CLOCK OPTIMIZATION REPORT #####[ 2 non-gated/non-generated clock tree(s) driving 578 clock pin(s) of sequential element(s) 0 gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s) 0 instances converted, 0 sequential instances remain driven by gated/generated clocks ============================ Non-Gated/Non-Generated Clocks ============================= Clock Tree ID Driving Element Drive Element Type Fanout Sample Instance ----------------------------------------------------------------------------------------- @KP:ckid0_0 jtaghub_inst.JTCK JTAGH19 306 ENCRYPTED @KP:ckid0_1 i_PLL1.clkop_o PLL1_uniq_1 272 led_cont[25:0] ========================================================================================= ##### END OF CLOCK OPTIMIZATION REPORT ###### @N: FX1143 |Skipping assigning INTERNAL_VREF to iobanks, because the table of mapping from pin to iobank is not initialized. Finished Pre Mapping Phase. Starting constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 179MB peak: 179MB) Finished constraint checker preprocessing (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 179MB peak: 180MB) @W:"c:/users/12801/downloads/radiant_seminar_ond/sample/lab1/impl_1/lab1_impl_1_cpe.ldc":3:0:3:0|Source for clock clk48m should be moved to net i_PLL1.lscc_pll_inst.clkop_o connected to driving cell pin i_PLL1.lscc_pll_inst.\\gen_no_refclk_mon\.u_PLL.CLKOP @W: MF511 |Found issues with constraints. Please check constraint checker report "C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\Lab1_impl_1_cck.rpt" . Finished constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 180MB peak: 180MB) Pre-mapping successful! At Mapper Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 99MB peak: 182MB) Process took 0h:00m:02s realtime, 0h:00m:02s cputime # Fri Nov 11 17:05:41 2022 ###########################################################] Map & Optimize Report # Fri Nov 11 17:05:41 2022 Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09LR-2 Install: C:\lscc\radiant\3.2\synpbase OS: Windows 10 or later Hostname: HD12801B Implementation : impl_1 Synopsys Lattice Technology Mapper, Version map202109lat, Build 180R, Built Jun 27 2022 09:38:19, @ Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 117MB peak: 117MB) @N: MF916 |Option synthesis_strategy=base is enabled. @N: MF248 |Running in 64-bit mode. @N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 119MB peak: 130MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 119MB peak: 130MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 134MB peak: 134MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 136MB peak: 137MB) Starting Optimization and Mapping (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:01s; Memory used current: 173MB peak: 173MB) @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_1 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_1 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_2 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_2 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_3 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_3 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_4 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_4 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_5 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_5 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_6 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_6 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_7 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_7 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8595:22:8595:33|Tristate driver apb_prdata_o_8 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_prdata_o_8 (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8594:16:8594:28|Tristate driver apb_pslverr_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_pslverr_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. @N: MO111 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":8593:16:8593:27|Tristate driver apb_pready_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) on net apb_pready_o (in view: work.PLL1_ipgen_lscc_pll_uniq_1_Z1_layer0(verilog)) has its enable tied to GND. Finished RTL optimizations (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 178MB peak: 178MB) @N: MO231 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":145:4:145:9|Found counter in view:work.Lab1(verilog) instance led_cont[25:0] @N: MO231 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":137:4:137:9|Found counter in view:work.Lab1(verilog) instance freq_cont[9:0] Starting factoring (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 181MB peak: 181MB) Finished factoring (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 183MB peak: 183MB) Available hyper_sources - for debug and ip models None Found Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 187MB peak: 187MB) Starting Early Timing Optimization (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:06s; Memory used current: 210MB peak: 210MB) Finished Early Timing Optimization (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 210MB peak: 211MB) Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 210MB peak: 211MB) Finished preparing to map (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 210MB peak: 211MB) Finished technology mapping (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 218MB peak: 218MB) Pass CPU time Worst Slack Luts / Registers ------------------------------------------------------------ 1 0h:00m:08s 0.66ns 575 / 509 Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 218MB peak: 218MB) @N: FX164 |The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute. Warning: Forcing use of GSR for flip-flops and latches that do not specify sets or resets capture_dr_d4 (in view: work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog)) capture_dr_d5 (in view: work.rvl_jtag_int_37s_7s_0s_0s_6s_37s_37s(verilog)) i_MULT.lscc_multiplier_inst.\\genblk1\.u_lscc_multiplier_dsp.result_o_mod[5] (in view: work.Lab1(verilog)) i_MULT.lscc_multiplier_inst.\\genblk1\.u_lscc_multiplier_dsp.result_o_mod[4] (in view: work.Lab1(verilog)) i_MULT.lscc_multiplier_inst.\\genblk1\.u_lscc_multiplier_dsp.result_o_mod[3] (in view: work.Lab1(verilog)) i_MULT.lscc_multiplier_inst.\\genblk1\.u_lscc_multiplier_dsp.result_o_mod[2] (in view: work.Lab1(verilog)) i_MULT.lscc_multiplier_inst.\\genblk1\.u_lscc_multiplier_dsp.result_o_mod[1] (in view: work.Lab1(verilog)) i_MULT.lscc_multiplier_inst.\\genblk1\.u_lscc_multiplier_dsp.result_o_mod[0] (in view: work.Lab1(verilog)) i_RAM_DP1.lscc_ram_dp_inst.mem_main.\\NON_MIX\.ADDR_ROUTE\[0\]\.DATA_ROUTE\[0\]\.genblk3\.f_rd_en_r (in view: work.Lab1(verilog)) led_cont[25] (in view: work.Lab1(verilog)) led_cont[24] (in view: work.Lab1(verilog)) led_cont[23] (in view: work.Lab1(verilog)) led_cont[22] (in view: work.Lab1(verilog)) led_cont[21] (in view: work.Lab1(verilog)) led_cont[20] (in view: work.Lab1(verilog)) led_cont[19] (in view: work.Lab1(verilog)) led_cont[18] (in view: work.Lab1(verilog)) led_cont[17] (in view: work.Lab1(verilog)) led_cont[16] (in view: work.Lab1(verilog)) led_cont[15] (in view: work.Lab1(verilog)) led_cont[14] (in view: work.Lab1(verilog)) led_cont[13] (in view: work.Lab1(verilog)) led_cont[12] (in view: work.Lab1(verilog)) led_cont[11] (in view: work.Lab1(verilog)) led_cont[10] (in view: work.Lab1(verilog)) led_cont[9] (in view: work.Lab1(verilog)) led_cont[8] (in view: work.Lab1(verilog)) led_cont[7] (in view: work.Lab1(verilog)) led_cont[6] (in view: work.Lab1(verilog)) led_cont[5] (in view: work.Lab1(verilog)) led_cont[4] (in view: work.Lab1(verilog)) led_cont[3] (in view: work.Lab1(verilog)) led_cont[2] (in view: work.Lab1(verilog)) led_cont[1] (in view: work.Lab1(verilog)) led_cont[0] (in view: work.Lab1(verilog)) te_precnt_val[15] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[14] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[13] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[12] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[11] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[10] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[9] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[8] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[7] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[6] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[5] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[4] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[3] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[2] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[1] (in view: work.rvl_te_Z7_layer0(verilog)) te_precnt_val[0] (in view: work.rvl_te_Z7_layer0(verilog)) Finished restoring hierarchy (Real Time elapsed 0h:00m:09s; CPU Time elapsed 0h:00m:08s; Memory used current: 218MB peak: 218MB) Start Writing Netlists (Real Time elapsed 0h:00m:09s; CPU Time elapsed 0h:00m:09s; Memory used current: 179MB peak: 219MB) Writing Analyst data base C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\synwork\Lab1_impl_1_m.srm Finished Writing Netlist Databases (Real Time elapsed 0h:00m:09s; CPU Time elapsed 0h:00m:09s; Memory used current: 217MB peak: 219MB) Writing Verilog Simulation files Writing scf file... (Real Time elapsed 0h:00m:10s; CPU Time elapsed 0h:00m:10s; Memory used current: 218MB peak: 219MB) @N: BW103 |The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns. @N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF Finished Writing Verilog Simulation files (Real Time elapsed 0h:00m:10s; CPU Time elapsed 0h:00m:10s; Memory used current: 218MB peak: 219MB) Finished Writing Netlists (Real Time elapsed 0h:00m:10s; CPU Time elapsed 0h:00m:10s; Memory used current: 218MB peak: 219MB) Start final timing analysis (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:10s; Memory used current: 214MB peak: 219MB) @W: MT246 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":240:28:240:39|Blackbox JTAGH19 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W: MT246 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":119:39:119:44|Blackbox OSCA is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W: MT246 :"c:\users\12801\downloads\radiant_seminar_ond\sample\lab1\impl_1\reveal_workspace\tmpreveal\lab1_rvl_top.v":9069:55:9069:78|Blackbox PLL is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @N: MT615 |Found clock clk48m with period 20.83ns @N: MT615 |Found clock rvltck with period 33.33ns @W: MT420 |Found inferred clock Lab1|jtck_inferred_clock with period 5.00ns. Please declare a user-defined clock on net jtck. ##### START OF TIMING REPORT #####[ # Timing report written on Fri Nov 11 17:05:53 2022 # Top view: Lab1 Requested Frequency: 30.0 MHz Wire load mode: top Paths requested: 5 Constraint File(s): C:\Users\12801\Downloads\Radiant_Seminar_ond\Sample\Lab1\impl_1\Lab1_impl_1_cpe.ldc C:\lscc\radiant\3.2\data\reveal\src\ertl\reveal_constraint.sdc @N: MT320 |This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report. @N: MT322 |Clock constraints include only register-to-register paths associated with each individual clock. Performance Summary ******************* Worst slack in design: 0.555 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group ---------------------------------------------------------------------------------------------------------------------------------- Lab1|jtck_inferred_clock 200.0 MHz 225.0 MHz 5.000 4.444 0.555 inferred Inferred_clkgroup_0_1 clk48m 48.0 MHz 244.7 MHz 20.833 4.086 16.747 declared default_clkgroup rvltck 30.0 MHz NA 33.330 NA NA declared default_clkgroup System 200.0 MHz 350.3 MHz 5.000 2.855 2.145 system system_clkgroup ================================================================================================================================== Estimated period and frequency reported as NA means no slack depends directly on the clock waveform Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise ------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack ------------------------------------------------------------------------------------------------------------------------------------------- System System | 5.000 2.145 | No paths - | No paths - | No paths - System clk48m | 20.833 19.103 | No paths - | No paths - | No paths - System Lab1|jtck_inferred_clock | No paths - | No paths - | 5.000 1.068 | No paths - clk48m System | 20.833 17.750 | No paths - | No paths - | No paths - clk48m clk48m | 20.833 16.747 | No paths - | No paths - | No paths - clk48m Lab1|jtck_inferred_clock | No paths - | No paths - | Diff grp - | No paths - Lab1|jtck_inferred_clock System | No paths - | No paths - | No paths - | 5.000 1.633 Lab1|jtck_inferred_clock clk48m | No paths - | No paths - | No paths - | Diff grp - Lab1|jtck_inferred_clock Lab1|jtck_inferred_clock | No paths - | 5.000 0.555 | No paths - | No paths - =========================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: Lab1|jtck_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------- ngfjhruLu9jrb Lab1|jtck_inferred_clock FD1P3DX Q jshift_d1 1.010 0.555 eLGADJzvI6lrAAobHrJ Lab1|jtck_inferred_clock FD1P3DX Q addr[0] 0.991 0.576 eLGADJzvI6lrAAobHxn Lab1|jtck_inferred_clock FD1P3DX Q addr[1] 0.981 0.586 eLGADJzvI6lrAAocx7J Lab1|jtck_inferred_clock FD1P3DX Q addr[9] 0.973 0.593 eLGADJzvI6lrAAocybJ Lab1|jtck_inferred_clock FD1P3DX Q addr[12] 0.960 0.599 eLGADJzvI6lrAAocyhn Lab1|jtck_inferred_clock FD1P3DX Q addr[13] 0.960 0.599 eLGADJzvI6lrAAobH23 Lab1|jtck_inferred_clock FD1P3DX Q addr[2] 0.964 0.603 eLGADJzvI6lrAAocx23 Lab1|jtck_inferred_clock FD1P3DX Q addr[8] 0.946 0.621 eLGADJzvI6lrAAobH7J Lab1|jtck_inferred_clock FD1P3DX Q addr[3] 0.941 0.625 JrykuKumiJldlLyI3 Lab1|jtck_inferred_clock FD1P3DX Q te_precnt[0] 0.798 0.643 =========================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------------- ikjxdeE9yeis2eI9 Lab1|jtck_inferred_clock FD1P3DX D parity_calc_5 4.789 0.555 fbJrh5D2aL7lbpJvvI3 Lab1|jtck_inferred_clock FD1P3DX D te_precnt_s[15] 5.144 0.643 fbJrh5D2aL7lbpJvv7J Lab1|jtck_inferred_clock FD1P3DX D te_precnt_s[13] 5.144 0.703 fbJrh5D2aL7lbpJvvDn Lab1|jtck_inferred_clock FD1P3DX D te_precnt_s[14] 5.144 0.703 jvmp30bLmJrLte02tr6kqqI1xn Lab1|jtck_inferred_clock FD1P3DX D tm_rd_addr_cntr_s[7] 5.144 0.734 jvmp30bLmJrLte02tr6kqqI123 Lab1|jtck_inferred_clock FD1P3DX D tm_rd_addr_cntr_s[8] 5.144 0.734 fbJrh5D2aL7lbpJvvxn Lab1|jtck_inferred_clock FD1P3DX D te_precnt_s[11] 5.144 0.761 fbJrh5D2aL7lbpJvv23 Lab1|jtck_inferred_clock FD1P3DX D te_precnt_s[12] 5.144 0.761 jvmp30bLmJrLte02tr6kqqI1m3 Lab1|jtck_inferred_clock FD1P3DX D tm_rd_addr_cntr_s[5] 5.144 0.792 jvmp30bLmJrLte02tr6kqqI1rJ Lab1|jtck_inferred_clock FD1P3DX D tm_rd_addr_cntr_s[6] 5.144 0.792 =========================================================================================================================== Worst Path Information *********************** Path information for path number 1: Requested Period: 5.000 - Setup time: 0.211 + Clock delay at ending point: 0.000 (ideal) = Required time: 4.789 - Propagation time: 4.234 - Clock delay at starting point: 0.000 (ideal) = Slack (critical) : 0.555 Number of logic level(s): 6 Starting point: ngfjhruLu9jrb / Q Ending point: ikjxdeE9yeis2eI9 / D The start point is clocked by Lab1|jtck_inferred_clock [falling] (rise=0.000 fall=2.500 period=5.000) on pin CK The end point is clocked by Lab1|jtck_inferred_clock [falling] (rise=0.000 fall=2.500 period=5.000) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------ ngfjhruLu9jrb FD1P3DX Q Out 1.010 1.010 r - jshift_d1 Net - - - - 69 c0tJrd8EEBCu5lx6vez9ws LUT4 A In 0.000 1.010 r - c0tJrd8EEBCu5lx6vez9ws LUT4 Z Out 0.678 1.688 r - N_61 Net - - - - 8 1nDbrteeFxGxi1Bu0Dq9ojK5yAL4gr LUT4 A In 0.000 1.688 r - 1nDbrteeFxGxi1Bu0Dq9ojK5yAL4gr LUT4 Z Out 0.523 2.212 r - jtdo_iv_i_m1_0_a2_4_1 Net - - - - 1 1nDbrteeFxGxi1Bu0Dq9ojK5yAL4gt LUT4 C In 0.000 2.212 r - 1nDbrteeFxGxi1Bu0Dq9ojK5yAL4gt LUT4 Z Out 0.523 2.735 r - jtdo_iv_i_m1_0_a2_4_3 Net - - - - 1 KcoForjIkbo7fwGh7mtl0KD9iCu LUT4 B In 0.000 2.735 r - KcoForjIkbo7fwGh7mtl0KD9iCu LUT4 Z Out 0.633 3.368 r - jtdo Net - - - - 4 jfyhuHcfopfbALDIbzt21k9Bl7 LUT4 B In 0.000 3.368 r - jfyhuHcfopfbALDIbzt21k9Bl7 LUT4 Z Out 0.523 3.890 r - parity_calc_5_iv_0 Net - - - - 1 psnA0m40JhxxLu8ro1GdjJg LUT4 C In 0.000 3.890 r - psnA0m40JhxxLu8ro1GdjJg LUT4 Z Out 0.343 4.234 r - parity_calc_5 Net - - - - 1 ikjxdeE9yeis2eI9 FD1P3DX D In 0.000 4.234 r - ================================================================================================ ==================================== Detailed Report for Clock: clk48m ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------- b8dvsIedgk9mBmfHwv4Hxcxhn clk48m FD1P3IX Q post_trig_cntr[0] 0.798 16.747 b8dvsIedgk9mBmfHwv4Hxcxm3 clk48m FD1P3IX Q post_trig_cntr[1] 0.798 16.747 b8dvsIedgk9mBmfHwv4Hxcxxn clk48m FD1P3IX Q post_trig_cntr[3] 0.798 16.747 b8dvsIedgk9mBmfHwv4Hxcx23 clk48m FD1P3IX Q post_trig_cntr[4] 0.798 16.747 b8dvsIedgk9mBmfHwv4Hxcx7J clk48m FD1P3IX Q post_trig_cntr[5] 0.798 16.747 b8dvsIedgk9mBmfHwv4HxcxDn clk48m FD1P3IX Q post_trig_cntr[6] 0.798 16.747 b8dvsIedgk9mBmfHwv4HxcxI3 clk48m FD1P3IX Q post_trig_cntr[7] 0.798 16.747 b8dvsIedgk9mBmfHwv4HxcybJ clk48m FD1P3IX Q post_trig_cntr[8] 0.798 16.747 u66Hae3oxv clk48m FD1P3IX Q capture 0.888 17.180 b8dvsIedgk9mBmfHwv4HxcxrJ clk48m FD1P3IX Q post_trig_cntr[2] 0.798 17.270 ======================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------- b8dvsIedgk9mBmfHwv4HxcxI3 clk48m FD1P3IX D post_trig_cntr_s[7] 20.977 16.747 b8dvsIedgk9mBmfHwv4HxcybJ clk48m FD1P3IX D post_trig_cntr_s[8] 20.977 16.747 ps846ma26kiJBxJsu98fwhn clk48m FD1P3IX D pre_trig_cntr_s[7] 20.977 16.747 ps846ma26kiJBxJsu98fwm3 clk48m FD1P3IX D pre_trig_cntr_s[8] 20.977 16.747 jvmp36mE4syAtlAjv2ldfAenm3 clk48m FD1P3IX D tm_wr_addr_cntr_s[7] 20.977 16.747 jvmp36mE4syAtlAjv2ldfAenrJ clk48m FD1P3IX D tm_wr_addr_cntr_s[8] 20.977 16.747 b8dvsIedgk9mBmfHwv4Hxcx7J clk48m FD1P3IX D post_trig_cntr_s[5] 20.977 16.806 b8dvsIedgk9mBmfHwv4HxcxDn clk48m FD1P3IX D post_trig_cntr_s[6] 20.977 16.806 ps846ma26kiJBxJsu98fvI3 clk48m FD1P3IX D pre_trig_cntr_s[5] 20.977 16.806 ps846ma26kiJBxJsu98fwbJ clk48m FD1P3IX D pre_trig_cntr_s[6] 20.977 16.806 ============================================================================================================= Worst Path Information *********************** Path information for path number 1: Requested Period: 20.833 - Setup time: -0.144 + Clock delay at ending point: 0.000 (ideal) = Required time: 20.977 - Propagation time: 4.230 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 16.747 Number of logic level(s): 8 Starting point: b8dvsIedgk9mBmfHwv4Hxcxhn / Q Ending point: b8dvsIedgk9mBmfHwv4HxcybJ / D The start point is clocked by clk48m [rising] (rise=0.000 fall=10.417 period=20.833) on pin CK The end point is clocked by clk48m [rising] (rise=0.000 fall=10.417 period=20.833) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------------------------------- b8dvsIedgk9mBmfHwv4Hxcxhn FD1P3IX Q Out 0.798 0.798 r - post_trig_cntr[0] Net - - - - 2 bfKJyz8ek8EAkehBnHHttvKHpHL2apq438yt23 LUT4 A In 0.000 0.798 r - bfKJyz8ek8EAkehBnHHttvKHpHL2apq438yt23 LUT4 Z Out 0.523 1.321 r - un1_capture18_0_304_0_0_o2_5 Net - - - - 1 bfKJyz8ek8EAkehBnHHttvKHpHLFu1cHxmBv23 LUT4 C In 0.000 1.321 r - bfKJyz8ek8EAkehBnHHttvKHpHLFu1cHxmBv23 LUT4 Z Out 0.608 1.929 r - N_122 Net - - - - 3 pCxezgxDwjCw1crl6z1g7HA LUT4 C In 0.000 1.929 r - pCxezgxDwjCw1crl6z1g7HA LUT4 Z Out 0.734 2.663 r - N_413_i Net - - - - 28 rdCbj4w8gHmJJjkfqpCj8zirnf4wnrG7J CCU2 A1 In 0.000 2.663 r - rdCbj4w8gHmJJjkfqpCj8zirnf4wnrG7J CCU2 COUT Out 0.784 3.446 r - post_trig_cntr_cry[0] Net - - - - 1 rdCbj4w8gHmJJjkfqpCj8zirnf4wnrGDn CCU2 CIN In 0.000 3.446 r - rdCbj4w8gHmJJjkfqpCj8zirnf4wnrGDn CCU2 COUT Out 0.059 3.506 r - post_trig_cntr_cry[2] Net - - - - 1 rdCbj4w8gHmJJjkfqpCj8zirnf4wnrHbJ CCU2 CIN In 0.000 3.506 r - rdCbj4w8gHmJJjkfqpCj8zirnf4wnrHbJ CCU2 COUT Out 0.059 3.564 r - post_trig_cntr_cry[4] Net - - - - 1 rdCbj4w8gHmJJjkfqpCj8zirnf4wnrHm3 CCU2 CIN In 0.000 3.564 r - rdCbj4w8gHmJJjkfqpCj8zirnf4wnrHm3 CCU2 COUT Out 0.059 3.623 r - post_trig_cntr_cry[6] Net - - - - 1 rdCbj4w8gHmJJjkfqpCj8zirnf4wnrHxn CCU2 CIN In 0.000 3.623 r - rdCbj4w8gHmJJjkfqpCj8zirnf4wnrHxn CCU2 S1 Out 0.607 4.230 r - post_trig_cntr_s[8] Net - - - - 1 b8dvsIedgk9mBmfHwv4HxcybJ FD1P3IX D In 0.000 4.230 r - ======================================================================================================== ==================================== Detailed Report for Clock: System ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------- jtaghub_inst System JTAGH19 JCE2 jce2 0.000 1.068 jtaghub_inst System JTAGH19 JSHIFT jshift 0.000 1.068 jtaghub_inst System JTAGH19 IP_ENABLE[0] ip_enable[0] 0.000 2.244 j1KhLm0LtsjyI4b6KnJ1F5GmyA7pmpx8CfgL System WIDEFN9 Z N_92 0.000 2.767 jtaghub_inst System JTAGH19 JTDI jtdi 0.000 3.923 jtaghub_inst System JTAGH19 JRSTN jrstn 0.000 4.249 hL8LyjC7v4iyovl6 System PDP16K DO[0] Data_r[0] 0.000 4.789 hL8LyjC7v4iyovl6 System PDP16K DO[0] Data_r[0] 0.000 4.789 hL8LyjC7v4iyovl6 System PDP16K DO[1] Data_r[1] 0.000 4.789 hL8LyjC7v4iyovl6 System PDP16K DO[1] Data_r[1] 0.000 4.789 ====================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------- ikjxdeE9yeis2eI9 System FD1P3DX D parity_calc_5 4.789 1.068 orh8KHqvnKqbJ System FD1P3BX D tm_crc_7[0] 4.789 1.591 jtaghub_inst System JTAGH19 ER2_TDO[0] er2_tdo[0] 5.000 2.145 jvmp30bLmJrLte02tr6kqqI1xn System FD1P3DX D tm_rd_addr_cntr_s[7] 5.144 2.238 jvmp30bLmJrLte02tr6kqqI123 System FD1P3DX D tm_rd_addr_cntr_s[8] 5.144 2.238 jvmp30bLmJrLte02tr6kqqI1m3 System FD1P3DX D tm_rd_addr_cntr_s[5] 5.144 2.297 jvmp30bLmJrLte02tr6kqqI1rJ System FD1P3DX D tm_rd_addr_cntr_s[6] 5.144 2.297 jvmp30bLmJrLte02tr6kqqI1bJ System FD1P3DX D tm_rd_addr_cntr_s[3] 5.144 2.356 jvmp30bLmJrLte02tr6kqqI1hn System FD1P3DX D tm_rd_addr_cntr_s[4] 5.144 2.356 jvmp30bLmJrLte02tr6kqqI0Dn System FD1P3DX D tm_rd_addr_cntr_s[1] 5.144 2.415 =================================================================================================================== Worst Path Information *********************** Path information for path number 1: Requested Period: 5.000 - Setup time: 0.211 + Clock delay at ending point: 0.000 (ideal) = Required time: 4.789 - Propagation time: 3.721 - Clock delay at starting point: 0.000 (ideal) - Estimated clock delay at start point: -0.000 = Slack (non-critical) : 1.068 Number of logic level(s): 7 Starting point: jtaghub_inst / JCE2 Ending point: ikjxdeE9yeis2eI9 / D The start point is clocked by System [rising] The end point is clocked by Lab1|jtck_inferred_clock [falling] (rise=0.000 fall=2.500 period=5.000) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------ jtaghub_inst JTAGH19 JCE2 Out 0.000 0.000 r - jce2 Net - - - - 12 fcdjBcrBAsAHEJHzfl6 LUT4 A In 0.000 0.000 r - fcdjBcrBAsAHEJHzfl6 LUT4 Z Out 0.608 0.608 r - tt_crc_en15_0 Net - - - - 3 Fxzjj7kb74Bhgyzbc LUT4 D In 0.000 0.608 r - Fxzjj7kb74Bhgyzbc LUT4 Z Out 0.568 1.176 r - N_134 Net - - - - 2 1nDbrteeFxGxi1Bu0Dq9ojK5yALb7b LUT4 A In 0.000 1.176 r - 1nDbrteeFxGxi1Bu0Dq9ojK5yALb7b LUT4 Z Out 0.523 1.699 f - jtdo_iv_i_m1_0_a2_3_1 Net - - - - 1 KcoForjIkbo7fwGh7mtl0KD9iCt LUT4 B In 0.000 1.699 f - KcoForjIkbo7fwGh7mtl0KD9iCt LUT4 Z Out 0.523 2.222 f - jtdo_iv_i_m1_0_a2_3 Net - - - - 1 KcoForjIkbo7fwGh7mtl0KD9iCu LUT4 A In 0.000 2.222 f - KcoForjIkbo7fwGh7mtl0KD9iCu LUT4 Z Out 0.633 2.855 f - jtdo Net - - - - 4 jfyhuHcfopfbALDIbzt21k9Bl7 LUT4 B In 0.000 2.855 f - jfyhuHcfopfbALDIbzt21k9Bl7 LUT4 Z Out 0.523 3.378 r - parity_calc_5_iv_0 Net - - - - 1 psnA0m40JhxxLu8ro1GdjJg LUT4 C In 0.000 3.378 r - psnA0m40JhxxLu8ro1GdjJg LUT4 Z Out 0.343 3.721 r - parity_calc_5 Net - - - - 1 ikjxdeE9yeis2eI9 FD1P3DX D In 0.000 3.721 r - ================================================================================================ ##### END OF TIMING REPORT #####] Timing exceptions that could not be applied Finished final timing analysis (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:10s; Memory used current: 215MB peak: 219MB) Finished timing report (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:10s; Memory used current: 215MB peak: 219MB) --------------------------------------- Resource Usage Report Part: lfmxo5_25-8 Register bits: 507 of 23040 (2%) PIC Latch: 0 I/O cells: 41 Block Rams : 4 of 80 (5%) Details: CCU2: 62 FD1P3BX: 32 FD1P3DX: 194 FD1P3IX: 279 FD1P3JX: 2 GSR: 1 IB: 3 INV: 9 JTAGH19: 1 LUT4: 546 MULT9X9: 1 OB: 38 OSCA: 1 PDP16K: 3 PDPSC16K: 1 PLL: 1 VHI: 21 VLO: 21 WIDEFN9: 5 Resource Usage inside macros: Registers: 0 LUTs: 0 EBRs: 0 LRAMs: 0 DSPs: 0 Distributed RAMs: 0 Carry Chains: 0 Blackboxes: 0 Mapping Summary: Total number of registers: 507 + 0 = 507 of 23040 (2.20%) Total number of LUTs: 546 + 0 = 546 Total number of EBRs: 4 + 0 = 4 of 80 (5.00%) Total number of LRAMs: 0 + 0 = 0 of 1 (0.00%) Total number of DSPs: 0 + 0 = 0 of 20 (0.00%) Total number of Distributed RAMs: 0 + 0 = 0 Total number of Carry Chains: 62 + 0 = 62 Total number of BlackBoxes: 46 + 0 = 46 Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:11s; Memory used current: 90MB peak: 219MB) Process took 0h:00m:11s realtime, 0h:00m:11s cputime # Fri Nov 11 17:05:53 2022 ###########################################################]