// TOOL:     vlog2tf
// DATE:     Wed Feb 16 17:25:57 2022

// TITLE:    Lattice Semiconductor Corporation
// MODULE:   spi_top
// DESIGN:   spi_top
// FILENAME: spi_top_tf.v
// PROJECT:  DEMO
// VERSION:  2.0
// This file is auto generated by Diamond


`timescale 1 ns / 1 ps

// Define Module for Test Fixture
module spi_top_tf();

// Inputs
    reg MISO;
    reg RST;
    reg clk_div;


// Outputs
    wire MOSI;
    wire CS;
    wire SCLK;
    wire [15:0] TMP_DATA_OUT;


// Bidirs


// Instantiate the UUT
// Please check and add your parameters manually
    spi_top UUT (
        .MISO(MISO),
        .MOSI(MOSI),
        .CS(CS),
        .SCLK(SCLK),
        .RST(RST),
        .TMP_DATA_OUT(TMP_DATA_OUT),
        .clk_div(clk_div)
        );


// Initialize Inputs
// You can add your stimulus here
    initial begin
            MISO = 0;
            RST = 0;
            clk_div = 0;
    end
    initial begin
      #20  RST = 1'b0;
      #60  RST = 1'b1;
      #20  RST = 1'b0;

      #10830 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b1;
      #80 MISO = 1'b0;
      #80 MISO = 1'b1;
      #80 MISO = 1'b1;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b1;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      #80 MISO = 1'b0;
      
    end
    always #20 clk_div = ~clk_div;

endmodule // spi_top_tf