Compile Report

Microsemi Corporation - Microsemi Libero Software Release v12.3 (Version 12.800.0.16)

Date: Fri Oct 8 15:27:20 2021

Device Selection

Family PolarFire
Device MPF100T
Package FCG484
Speed Grade -1
Core Voltage 1.0V
Part Range EXT
Default I/O technology LVCMOS 1.8V
Restrict Probe Pins Yes

Source Files

Topcell top
Format Verilog
Source E:\sample\floorplan\floorplan_v12.3\top\synthesis\top.vm

Options

Limit the number of high fanout nets to display to 10

Resource Usage

Type Used Total Percentage
4LUT 0 108600 0.00
DFF 2193 108600 2.02
I/O Register 0 732 0.00
User I/O 8 244 3.28
-- Single-ended I/O 8 244 3.28
-- Differential I/O Pairs 0 122 0.00
uSRAM 0 1008 0.00
LSRAM 0 352 0.00
Math 0 336 0.00
H-Chip Global 3 48 6.25
PLL 1 8 12.50
DLL 0 8 0.00
CRN_INT 1 24 4.17
OSC_RC160MHZ 1 1 100.00
Transceiver Lanes 0 8 0.00
Transceiver PCIe 0 2 0.00
ICB_CLKINT 2 72 2.78

Detailed Logic Resource Usage

Type 4LUT DFF
Fabric Logic 0 2193
uSRAM Interface Logic 0 0
LSRAM Interface Logic 0 0
Math Interface Logic 0 0
Total Used 0 2193

I/O Function

Type w/o register w/ register w/ DDR register
Input I/O 4 0 0
Output I/O 4 0 0
Bidirectional I/O 0 0 0
Differential Input I/O Pairs 0 0 0
Differential Output I/O Pairs 0 0 0

Nets assigned to chip global resources

Fanout Type Name
2193 INT_NET Net : PF_CCC_C0_0_OUT0_FABCLK_0
Driver: PF_CCC_C0_0/PF_CCC_C0_0/clkint_0/U0_RGB1
Source: NETLIST
2192 INT_NET Net : DFN1_0_Q_arst
Driver: DFN1_0_RNIO38A/U0_RGB1
Source: NETLIST
1 INT_NET Net : PF_OSC_C0_0_RCOSC_160MHZ_GL
Driver: PF_OSC_C0_0/PF_OSC_C0_0/I_OSC_160_INT/U0_RGB1
Source: NETLIST

Nets assigned to row global resources

Fanout Type Name

High fanout nets

Fanout Type Name
1 INT_NET Net : PF_CCC_C0_0/PF_CCC_C0_0/clkint_0/U0_Y
Driver: PF_CCC_C0_0/PF_CCC_C0_0/clkint_0
Source: NETLIST
1 INT_NET Net : PF_CCC_C0_0_PLL_LOCK_0
Driver: PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0
1 INT_NET Net : PF_OSC_C0_0/PF_OSC_C0_0/I_OSC_160_INT/U0_Y
Driver: PF_OSC_C0_0/PF_OSC_C0_0/I_OSC_160_INT
Source: NETLIST
1 INT_NET Net : DFN1_0_RNIO38A/U0_Y
Driver: DFN1_0_RNIO38A
Source: NETLIST
1 INT_NET Net : C_data_in_c
Driver: C_data_in_ibuf
1 INT_NET Net : H_data_in_c
Driver: H_data_in_ibuf
1 INT_NET Net : M_data_in_c
Driver: M_data_in_ibuf
1 INT_NET Net : P_data_in_c
Driver: P_data_in_ibuf
1 INT_NET Net : C_q_c
Driver: C_ShiftReg_0/q_r[63]
1 INT_NET Net : H_q_c
Driver: H_ShiftReg_0/q_r[63]

High fanout nets (through buffer trees)

Fanout Type Name
1 INT_NET Net : PF_CCC_C0_0/PF_CCC_C0_0/clkint_0/U0_Y
Driver: PF_CCC_C0_0/PF_CCC_C0_0/clkint_0
Source: NETLIST
1 INT_NET Net : PF_CCC_C0_0_PLL_LOCK_0
Driver: PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0
1 INT_NET Net : PF_OSC_C0_0/PF_OSC_C0_0/I_OSC_160_INT/U0_Y
Driver: PF_OSC_C0_0/PF_OSC_C0_0/I_OSC_160_INT
Source: NETLIST
1 INT_NET Net : DFN1_0_RNIO38A/U0_Y
Driver: DFN1_0_RNIO38A
Source: NETLIST
1 INT_NET Net : C_data_in_c
Driver: C_data_in_ibuf
1 INT_NET Net : H_data_in_c
Driver: H_data_in_ibuf
1 INT_NET Net : M_data_in_c
Driver: M_data_in_ibuf
1 INT_NET Net : P_data_in_c
Driver: P_data_in_ibuf
1 INT_NET Net : C_q_c
Driver: C_ShiftReg_0/q_r[63]
1 INT_NET Net : H_q_c
Driver: H_ShiftReg_0/q_r[63]