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Is it possible to pull the write_req signal low during a write burst in UniPHY?
Device: Arria® V
Category: External memory interface
In UniPHY, it is possible to pull the write_req signal low during a write burst.
However, it is necessary to stop the write sequence.
For details, please refer to the document below.
https://www.altera.com/en_US/pdfs/literature/manual/mnl_avalon_spec.pdf
* See "Write Burst with constantBurstBehavior Set to False for Master and Slave".
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