When I implemented Altera's CPRI IP Core to build a REC system and an RE system and sent data from the REC to the RE, the link was not established on the receiving RE and it stopped at State B (L1 synchronization). Is there any possible reason? The signal quality on the transmission path is good and no LOS (Loss Of Signal) has occurred.

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When I implemented Altera's CPRI IP Core and built a REC system and an RE system respectively and sent data from REC to RE, the RE on the receiving side did not establish a link and stopped in State B (L1 synchronizatio). has become Are there any possible factors? The signal quality on the transmission path is good, and no LOS (Loss Of Signal) occurs.

Category: IP (CPRI)
tool:-
device:-

Check if the REC and RE register settings, especially the CPRI configuration register (CPRI_CONFIG - Offset: 0x008) settings are set as follows:

■ REC side
CPRI_CONFIG : 0x00000021
* The setting contents of each bit field at this time are as follows.
- Bit 1 "operation_mode" ⇒ 0 : master clocking mode
- Bit 0 "tx_ctrl_insert_en " ⇒ 1 : enable master to insert control transmit table entries

■ RE side
CPRI_CONFIG: 0x0000_0022
* The setting contents of each bit field at this time are as follows.
- Bit 1 "operation_mode" ⇒ 1 : slave clocking mode
- Bit 0 "tx_ctrl_insert_en " ⇒ 0 : Master disables control transmit table entries insertion

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