Category: Specifications
Tools: Quartus® Prime / Quartus II
Device: Arria® 10


Always use an I/O PLL when utilizing the LVDS SERDES block.
When using the LVDS SERDES in Transmitter, the TX pins of adjacent I/O banks can be driven by one I/O PLL.
However, clocks cannot be supplied to non-adjacent I/O banks.

For details, refer to the document below.
https://www.altera.com/en_US/pdfs/literature/hb/arria-10/a10_handbook.pdf
(Search for PLLs Driving Differential Transmitter Channels.)