Analog Devices TimerBlox : I'm thinking of using the LTC6992-1 to make 30KHz pulses. The voltage to be input to VDIV/V+ is generated from 10V by a voltage dividing resistor and input. In this case, the pulse cannot get the desired 30KHz. Why?

clock & timing

The division setting NDIV is determined by the voltage ratio of "VDIV/V+" and the allowed voltage ratio is ±1.5%. The desired frequency may not be obtained due to the difference in this voltage ratio.

For example, let's say that a voltage drop occurs due to a small resistance value that divides the voltage. Due to this voltage drop, it is possible that the allowable voltage ratio of VDIV/V+ is not met. Please make a review such as increasing the voltage dividing resistance.

 

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